soc/mediatek/mt8186: Add GPIO driving functions
Add GPIO driving functions to adjust pin driving. The value of drive strength is different for each SoC, so we define GPIO_DRV0 to GPIO_DRV7 which are corresponding to 2/4/6/8/10/12/14/16mA in MT8186. This implementation is according to chapter 5.1 in MT8186 Functional Specification. BUG=b:218775654, b:216462313, b:212375511 TEST=build pass Signed-off-by: Guodong Liu <guodong.liu@mediatek.corp-partner.google.com> Change-Id: I6d987f28be98b515fa5c542222bda08bea1d5118 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62471 Reviewed-by: Yu-Ping Wu <yupingso@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Guodong Liu
Felix Held
parent
6555c4c601
commit
ada2a63dab
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@ -18,10 +18,39 @@ enum pull_select {
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GPIO_PULL_UP = 1,
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};
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/*
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* GPIO DRIVING
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* Special IO(I2C, HDMI...) advanced drive strength:
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* GPIO_DRV_ADV_125_UA: 0.125mA
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* GPIO_DRV_ADV_250_UA: 0.25mA
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* GPIO_DRV_ADV_500_UA: 0.5mA
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* GPIO_DRV_ADV_1_MA: 1mA
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*/
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enum gpio_drv_adv {
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GPIO_DRV_ADV_125_UA = 0,
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GPIO_DRV_ADV_250_UA = 1,
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GPIO_DRV_ADV_500_UA = 2,
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GPIO_DRV_ADV_1_MA = 3,
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};
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struct gpio_drv_info {
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uint32_t offset;
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uint8_t shift;
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uint8_t width;
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};
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void gpio_set_pull(gpio_t gpio, enum pull_enable enable,
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enum pull_select select);
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void gpio_set_mode(gpio_t gpio, int mode);
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/* Normal driving function */
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int gpio_set_driving(gpio_t gpio, uint8_t drv);
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int gpio_get_driving(gpio_t gpio);
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/* Advanced driving function */
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int gpio_set_driving_adv(gpio_t gpio, enum gpio_drv_adv drv);
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int gpio_get_driving_adv(gpio_t gpio);
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enum gpio_irq_type {
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IRQ_TYPE_EDGE_RISING,
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IRQ_TYPE_EDGE_FALLING,
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@ -8,6 +8,221 @@
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#include <device/mmio.h>
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#include <gpio.h>
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static const struct gpio_drv_info gpio_driving_info[] = {
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[0] = { 0x0, 27, 3, },
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[1] = { 0x0, 27, 3, },
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[2] = { 0x0, 27, 3, },
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[3] = { 0x0, 27, 3, },
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[4] = { 0x10, 0, 3, },
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[5] = { 0x10, 0, 3, },
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[6] = { 0x0, 9, 3, },
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[7] = { 0x0, 9, 3, },
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[8] = { 0x0, 9, 3, },
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[9] = { 0x0, 12, 3, },
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[10] = { 0x0, 0, 3, },
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[11] = { 0x0, 3, 3, },
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[12] = { 0x0, 6, 3, },
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[13] = { 0x0, 0, 3, },
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[14] = { 0x0, 3, 3, },
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[15] = { 0x10, 3, 3, },
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[16] = { 0x10, 3, 3, },
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[17] = { 0x0, 21, 3, },
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[18] = { 0x10, 0, 3, },
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[19] = { 0x0, 27, 3, },
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[20] = { 0x0, 24, 3, },
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[21] = { 0x0, 27, 3, },
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[22] = { 0x0, 24, 3, },
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[23] = { 0x10, 0, 3, },
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[24] = { 0x10, 9, 3, },
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[25] = { 0x10, 0, 3, },
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[26] = { 0x0, 27, 3, },
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[27] = { 0x0, 27, 3, },
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[28] = { 0x10, 0, 3, },
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[29] = { 0x10, 0, 3, },
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[30] = { 0x10, 0, 3, },
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[31] = { 0x10, 3, 3, },
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[32] = { 0x0, 6, 3, },
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[33] = { 0x0, 6, 3, },
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[34] = { 0x0, 3, 3, },
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[35] = { 0x0, 3, 3, },
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[36] = { 0x0, 9, 3, },
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[37] = { 0x0, 9, 3, },
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[38] = { 0x0, 12, 3, },
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[39] = { 0x0, 9, 3, },
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[40] = { 0x0, 15, 3, },
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[41] = { 0x0, 12, 3, },
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[42] = { 0x0, 12, 3, },
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[43] = { 0x0, 12, 3, },
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[44] = { 0x10, 6, 3, },
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[45] = { 0x10, 3, 3, },
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[46] = { 0x10, 3, 3, },
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[47] = { 0x10, 6, 3, },
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[48] = { 0x0, 15, 3, },
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[49] = { 0x0, 15, 3, },
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[50] = { 0x0, 15, 3, },
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[51] = { 0x0, 18, 3, },
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[52] = { 0x10, 3, 3, },
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[53] = { 0x10, 6, 3, },
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[54] = { 0x10, 3, 3, },
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[55] = { 0x10, 3, 3, },
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[56] = { 0x10, 3, 3, },
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[57] = { 0x10, 6, 3, },
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[58] = { 0x10, 6, 3, },
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[59] = { 0x10, 3, 3, },
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[60] = { 0x0, 24, 3, },
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[61] = { 0x0, 24, 3, },
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[62] = { 0x0, 24, 3, },
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[63] = { 0x0, 24, 3, },
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[64] = { 0x0, 27, 3, },
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[65] = { 0x0, 27, 3, },
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[66] = { 0x0, 27, 3, },
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[67] = { 0x10, 0, 3, },
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[68] = { 0x0, 0, 3, },
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[69] = { 0x0, 3, 3, },
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[70] = { 0x10, 3, 3, },
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[71] = { 0x0, 6, 3, },
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[72] = { 0x0, 9, 3, },
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[73] = { 0x0, 12, 3, },
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[74] = { 0x0, 15, 3, },
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[75] = { 0x0, 18, 3, },
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[76] = { 0x0, 21, 3, },
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[77] = { 0x0, 24, 3, },
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[78] = { 0x0, 27, 3, },
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[79] = { 0x0, 24, 3, },
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[80] = { 0x0, 24, 3, },
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[81] = { 0x0, 21, 3, },
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[82] = { 0x0, 21, 3, },
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[83] = { 0x10, 3, 3, },
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[84] = { 0x0, 6, 3, },
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[85] = { 0x0, 9, 3, },
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[86] = { 0x0, 12, 3, },
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[87] = { 0x0, 15, 3, },
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[88] = { 0x0, 18, 3, },
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[89] = { 0x0, 21, 3, },
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[90] = { 0x0, 27, 3, },
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[91] = { 0x10, 0, 3, },
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[92] = { 0x10, 0, 3, },
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[93] = { 0x10, 0, 3, },
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[94] = { 0x10, 0, 3, },
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[95] = { 0x10, 3, 3, },
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[96] = { 0x0, 9, 3, },
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[97] = { 0x0, 6, 3, },
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[98] = { 0x0, 3, 3, },
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[99] = { 0x0, 18, 3, },
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[100] = { 0x0, 18, 3, },
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[101] = { 0x0, 21, 3, },
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[102] = { 0x0, 21, 3, },
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[103] = { 0x0, 21, 3, },
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[104] = { 0x0, 21, 3, },
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[105] = { 0x0, 24, 3, },
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[106] = { 0x0, 24, 3, },
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[107] = { 0x0, 24, 3, },
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[108] = { 0x0, 24, 3, },
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[109] = { 0x0, 27, 3, },
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[110] = { 0x0, 27, 3, },
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[111] = { 0x0, 27, 3, },
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[112] = { 0x0, 27, 3, },
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[113] = { 0x10, 0, 3, },
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[114] = { 0x10, 0, 3, },
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[115] = { 0x10, 6, 3, },
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[116] = { 0x10, 9, 3, },
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[117] = { 0x10, 6, 3, },
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[118] = { 0x10, 6, 3, },
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[119] = { 0x0, 18, 3, },
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[120] = { 0x0, 9, 3, },
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[121] = { 0x0, 12, 3, },
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[122] = { 0x0, 15, 3, },
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[123] = { 0x0, 21, 3, },
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[124] = { 0x0, 0, 3, },
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[125] = { 0x0, 3, 3, },
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[126] = { 0x0, 6, 3, },
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[127] = { 0x10, 12, 3, },
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[128] = { 0x10, 18, 3, },
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[129] = { 0x10, 12, 3, },
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[130] = { 0x10, 18, 3, },
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[131] = { 0x10, 15, 3, },
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[132] = { 0x10, 21, 3, },
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[133] = { 0x10, 15, 3, },
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[134] = { 0x10, 21, 3, },
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[135] = { 0x10, 6, 3, },
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[136] = { 0x10, 15, 3, },
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[137] = { 0x10, 18, 3, },
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[138] = { 0x10, 24, 3, },
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[139] = { 0x0, 21, 3, },
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[140] = { 0x0, 24, 3, },
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[141] = { 0x10, 15, 3, },
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[142] = { 0x10, 21, 3, },
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[143] = { 0x10, 9, 3, },
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[144] = { 0x10, 18, 3, },
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[145] = { 0x10, 12, 3, },
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[146] = { 0x10, 21, 3, },
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[147] = { 0x0, 12, 3, },
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[148] = { 0x0, 12, 3, },
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[149] = { 0x0, 12, 3, },
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[150] = { 0x0, 15, 3, },
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[151] = { 0x0, 15, 3, },
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[152] = { 0x0, 9, 3, },
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[153] = { 0x0, 15, 3, },
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[154] = { 0x0, 15, 3, },
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[155] = { 0x0, 18, 3, },
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[156] = { 0x0, 18, 3, },
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[157] = { 0x0, 0, 3, },
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[158] = { 0x0, 0, 3, },
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[159] = { 0x0, 0, 3, },
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[160] = { 0x0, 0, 3, },
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[161] = { 0x0, 6, 3, },
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[162] = { 0x0, 3, 3, },
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[163] = { 0x10, 12, 3, },
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/* 164 is unimplemented */
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[165] = { 0x10, 6, 3, },
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[166] = { 0x10, 6, 3, },
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[167] = { 0x10, 9, 3, },
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[168] = { 0x10, 6, 3, },
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[169] = { 0x10, 12, 3, },
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[170] = { 0x10, 9, 3, },
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[171] = { 0x10, 9, 3, },
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[172] = { 0x10, 9, 3, },
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[173] = { 0x10, 6, 3, },
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[174] = { 0x0, 9, 3, },
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[175] = { 0x0, 12, 3, },
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[176] = { 0x0, 0, 3, },
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[177] = { 0x0, 3, 3, },
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[178] = { 0x0, 6, 3, },
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[179] = { 0x0, 15, 3, },
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[180] = { 0x0, 18, 3, },
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[181] = { 0x0, 21, 3, },
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[182] = { 0x0, 24, 3, },
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[183] = { 0x0, 27, 3, },
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[184] = { 0x10, 0, 3, },
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};
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_Static_assert(ARRAY_SIZE(gpio_driving_info) == GPIO_NUM,
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"gpio_driving_info array size not match");
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/* Unimplemented GPIOs are intentionally omitted here with width=0 */
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static const struct gpio_drv_info gpio_driving_adv_info[GPIO_NUM] = {
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[127] = { 0x30, 0, 3, },
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[128] = { 0x30, 6, 3, },
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[129] = { 0x30, 0, 3, },
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[130] = { 0x30, 6, 3, },
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[131] = { 0x30, 3, 3, },
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[132] = { 0x30, 9, 3, },
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[133] = { 0x30, 0, 3, },
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[134] = { 0x30, 6, 3, },
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[135] = { 0x20, 0, 3, },
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[136] = { 0x20, 9, 3, },
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[137] = { 0x30, 3, 3, },
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[138] = { 0x30, 9, 3, },
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[139] = { 0x20, 0, 3, },
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[140] = { 0x20, 3, 3, },
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[141] = { 0x30, 3, 3, },
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[142] = { 0x30, 9, 3, },
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[143] = { 0x20, 3, 3, },
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[144] = { 0x20, 12, 3, },
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[145] = { 0x20, 6, 3, },
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[146] = { 0x20, 15, 3, },
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};
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static void *gpio_find_reg_addr(gpio_t gpio)
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{
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void *reg_addr;
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@ -95,3 +310,98 @@ void gpio_set_pull(gpio_t gpio, enum pull_enable enable,
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else
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gpio_set_pull_pu_pd(gpio, enable, select);
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}
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static inline bool is_valid_drv(uint8_t drv)
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{
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return drv <= GPIO_DRV_16_MA;
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}
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static inline bool is_valid_drv_adv(enum gpio_drv_adv drv)
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{
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return drv <= GPIO_DRV_ADV_1_MA && drv >= GPIO_DRV_ADV_125_UA;
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}
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int gpio_set_driving(gpio_t gpio, uint8_t drv)
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{
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uint32_t mask;
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const struct gpio_drv_info *info = &gpio_driving_info[gpio.id];
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const struct gpio_drv_info *adv_info = &gpio_driving_adv_info[gpio.id];
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void *reg, *reg_adv;
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if (!is_valid_drv(drv))
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return -1;
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reg = gpio_find_reg_addr(gpio) + info->offset;
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reg_adv = gpio_find_reg_addr(gpio) + adv_info->offset;
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if (info->width == 0)
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return -1;
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mask = BIT(info->width) - 1;
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/* Check setting value is not beyond width */
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if ((uint32_t)drv > mask)
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return -1;
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clrsetbits32(reg, mask << info->shift, drv << info->shift);
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/* Disable EH if supported */
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if (adv_info->width != 0)
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clrbits32(reg_adv, BIT(adv_info->shift));
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return 0;
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}
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int gpio_get_driving(gpio_t gpio)
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{
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const struct gpio_drv_info *info = &gpio_driving_info[gpio.id];
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void *reg;
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reg = gpio_find_reg_addr(gpio) + info->offset;
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if (info->width == 0)
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return -1;
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return (read32(reg) >> info->shift) & (BIT(info->width) - 1);
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}
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int gpio_set_driving_adv(gpio_t gpio, enum gpio_drv_adv drv)
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{
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uint32_t mask;
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const struct gpio_drv_info *adv_info = &gpio_driving_adv_info[gpio.id];
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void *reg_adv;
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if (!is_valid_drv_adv(drv))
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return -1;
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reg_adv = gpio_find_reg_addr(gpio) + adv_info->offset;
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if (adv_info->width == 0)
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return -1;
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/* Not include EH bit (the lowest bit) */
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if ((uint32_t)drv > (BIT(adv_info->width - 1) - 1))
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return -1;
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mask = BIT(adv_info->width) - 1;
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/* EH enable */
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drv = (drv << 1) | BIT(0);
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clrsetbits32(reg_adv, mask << adv_info->shift, drv << adv_info->shift);
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return 0;
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}
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int gpio_get_driving_adv(gpio_t gpio)
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{
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const struct gpio_drv_info *adv_info = &gpio_driving_adv_info[gpio.id];
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void *reg_adv;
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uint32_t drv;
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reg_adv = gpio_find_reg_addr(gpio) + adv_info->offset;
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if (adv_info->width == 0)
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return -1;
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drv = (read32(reg_adv) >> adv_info->shift) & (BIT(adv_info->width) - 1);
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/* Drop EH bit */
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return drv >> 1;
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}
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@ -12,12 +12,25 @@
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#include <soc/gpio_common.h>
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#include <types.h>
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#define GPIO_NUM 185
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enum {
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MAX_GPIO_REG_BITS = 32,
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MAX_GPIO_MODE_PER_REG = 8,
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GPIO_MODE_BITS = 4,
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};
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enum gpio_drv {
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GPIO_DRV_2_MA = 0,
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GPIO_DRV_4_MA = 1,
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GPIO_DRV_6_MA = 2,
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GPIO_DRV_8_MA = 3,
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GPIO_DRV_10_MA = 4,
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GPIO_DRV_12_MA = 5,
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GPIO_DRV_14_MA = 6,
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GPIO_DRV_16_MA = 7,
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};
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#define PIN(id, name, flag, bit, base, offset, \
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func1, func2, func3, func4, func5, func6, func7) \
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PAD_##name##_ID = id, \
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