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nb/intel/gm45: Introduce memmap.h 

Move all memory map definitions into a separate header.

Tested with BUILD_TIMELESS=1, Roda RK9 remains identical.

Change-Id: Idddb63069b7a0b7b4d6c7850473a71318748bb9b
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45451
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Angel Pons 2020-09-16 13:25:02 +02:00
parent 3e33be2e69
commit ae2a522827
2 changed files with 16 additions and 8 deletions
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9
src/northbridge/intel/gm45/gm45.h
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@ -170,14 +170,7 @@ enum {
#define CMOS_READ_TRAINING 0x80 /* 16 bytes */
#define CMOS_WRITE_TRAINING 0x90 /* 16 bytes (could be reduced to 10 bytes) */
#define DEFAULT_MCHBAR 0xfed14000
#define DEFAULT_DMIBAR 0xfed18000
#define DEFAULT_EPBAR 0xfed19000
#define IOMMU_BASE1 0xfed90000
#define IOMMU_BASE2 0xfed91000
#define IOMMU_BASE3 0xfed92000
#define IOMMU_BASE4 0xfed93000
#include "memmap.h"
/*
* D0:F0

15
src/northbridge/intel/gm45/memmap.h Normal file
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@ -0,0 +1,15 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#ifndef __NORTHBRIDGE_INTEL_GM45_MEMMAP_H__
#define __NORTHBRIDGE_INTEL_GM45_MEMMAP_H__
#define DEFAULT_MCHBAR 0xfed14000
#define DEFAULT_DMIBAR 0xfed18000
#define DEFAULT_EPBAR 0xfed19000
#define IOMMU_BASE1 0xfed90000
#define IOMMU_BASE2 0xfed91000
#define IOMMU_BASE3 0xfed92000
#define IOMMU_BASE4 0xfed93000
#endif /* __NORTHBRIDGE_INTEL_GM45_MEMMAP_H__ */