mb/google/dedede/var/madoo: Update DPTF setting
Add tcc, critical, passive policy, and pl values from thermal team. BUG=b:169215576 TEST=build and verify by thermal tool Signed-off-by: John Su <john_su@compal.corp-partner.google.com> Change-Id: I4f61eaa7eab2b86b04ff0541886621afb3082b1a Reviewed-on: https://review.coreboot.org/c/coreboot/+/45784 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
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@ -53,7 +53,34 @@ chip soc/intel/jasperlake
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},
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},
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}"
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register "power_limits_config" = "{
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.tdp_pl1_override = 6,
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.tdp_pl2_override = 20,
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}"
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register "tcc_offset" = "5" # TCC of 95C
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device domain 0 on
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device pci 04.0 on
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chip drivers/intel/dptf
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register "policies.passive[0]" = "DPTF_PASSIVE(CPU, CPU, 65, 1000)"
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register "policies.critical[0]" = "DPTF_CRITICAL(CPU, 100, SHUTDOWN)"
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register "controls.power_limits.pl1" = "{
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.min_power = 4800,
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.max_power = 6000,
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.time_window_min = 1 * MSECS_PER_SEC,
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.time_window_max = 1 * MSECS_PER_SEC,
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.granularity = 200,}"
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register "controls.power_limits.pl2" = "{
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.min_power = 20000,
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.max_power = 20000,
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.time_window_min = 1 * MSECS_PER_SEC,
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.time_window_max = 1 * MSECS_PER_SEC,
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.granularity = 1000,}"
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device generic 0 on end
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end
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end # SA Thermal device
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device pci 14.0 on
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chip drivers/usb/acpi
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device usb 0.0 on
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