amd/mct/ddr3: Wait for northbridge P-state transitions
The existing code waiting for northbridge P-state transitions contained a logical error preventing correct operation. Fix the logical error and force coreboot to wait for the P-state transitions per the BKDG. Found-by: Coverity Scan #1347388 Change-Id: I35f498c836db1439734abe684354c18c8e160368 Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com> Reviewed-on: https://review.coreboot.org/18069 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
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@ -6737,7 +6737,7 @@ void mct_ForceNBPState0_En_Fam15(struct MCTStatStruc *pMCTstat,
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/* Wait until CurNbPState == NbPstateLo */
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do {
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dword2 = Get_NB32(pDCTstat->dev_nbctl, 0x174);
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} while (((dword2 << 19) & 0x7) != (dword & 0x3));
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} while (((dword2 >> 19) & 0x7) != (dword & 0x3));
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}
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dword = Get_NB32(pDCTstat->dev_nbctl, 0x170);
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dword &= ~(0x3 << 6); /* NbPstateHi = 0 */
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@ -6748,7 +6748,7 @@ void mct_ForceNBPState0_En_Fam15(struct MCTStatStruc *pMCTstat,
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/* Wait until CurNbPState == 0 */
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do {
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dword2 = Get_NB32(pDCTstat->dev_nbctl, 0x174);
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} while (((dword2 << 19) & 0x7) != 0);
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} while (((dword2 >> 19) & 0x7) != 0);
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}
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}
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}
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