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amd/mct/ddr3: Wait for northbridge P-state transitions 

The existing code waiting for northbridge P-state transitions
contained a logical error preventing correct operation.  Fix
the logical error and force coreboot to wait for the P-state
transitions per the BKDG.

Found-by: Coverity Scan #1347388
Change-Id: I35f498c836db1439734abe684354c18c8e160368
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
Reviewed-on: https://review.coreboot.org/18069
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply@raptorengineeringinc.com>
This commit is contained in:
Timothy Pearson 2017-01-09 12:33:22 -06:00
parent 3f2d6c0cf3
commit aeaabd3fa3
1 changed files with 2 additions and 2 deletions
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4
src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
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@ -6737,7 +6737,7 @@ void mct_ForceNBPState0_En_Fam15(struct MCTStatStruc *pMCTstat,
/* Wait until CurNbPState == NbPstateLo */ /* Wait until CurNbPState == NbPstateLo */
do { do {
dword2 = Get_NB32(pDCTstat->dev_nbctl, 0x174); dword2 = Get_NB32(pDCTstat->dev_nbctl, 0x174);
} while (((dword2 << 19) & 0x7) != (dword & 0x3)); } while (((dword2 >> 19) & 0x7) != (dword & 0x3));
} }
dword = Get_NB32(pDCTstat->dev_nbctl, 0x170); dword = Get_NB32(pDCTstat->dev_nbctl, 0x170);
dword &= ~(0x3 << 6); /* NbPstateHi = 0 */ dword &= ~(0x3 << 6); /* NbPstateHi = 0 */
@ -6748,7 +6748,7 @@ void mct_ForceNBPState0_En_Fam15(struct MCTStatStruc *pMCTstat,
/* Wait until CurNbPState == 0 */ /* Wait until CurNbPState == 0 */
do { do {
dword2 = Get_NB32(pDCTstat->dev_nbctl, 0x174); dword2 = Get_NB32(pDCTstat->dev_nbctl, 0x174);
} while (((dword2 << 19) & 0x7) != 0); } while (((dword2 >> 19) & 0x7) != 0);
} }
} }
} }