Fix gcc 4.6.1 breakage of southbridge/amd/sr5650/pcie.c.

Change-Id: I3ccb3860207e1b3ccac4313f7b537c434af5166f
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/360
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
Reviewed-by: Rudolf Marek <r.marek@assembler.cz>

src/southbridge/amd/sr5650/pcie.c

@@ -370,8 +370,8 @@ static void gpp3a_cpl_buf_alloc(device_t nb_dev, device_t dev)
 		slave_cpl = (u8 *)&pGpp111111;
 		break;
 	default:  /* shouldn't be here. */
-		printk(BIOS_DEBUG, "buggy gpp3a_configuration\n");
-		break;
+		printk(BIOS_WARNING, "buggy gpp3a_configuration\n");
+		return;
 	}
 
 	value = slave_cpl[dev_index - 4];