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soc/intel/tigerlake: Fix smm_relocation_params 

Platform is not yet build-tested, this should have gone in
with commit f5c0d61 intel/smm: Provide common smm_relocation_params.

Change-Id: Iba667972e361d3ed463258357ab6bbde26ef1e06
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37165
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Kyösti Mälkki 2019-11-22 23:15:29 +02:00 committed by Patrick Georgi
parent 7d802a48f3
commit b0f15f0f86
2 changed files with 1 additions and 11 deletions
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1
src/soc/intel/tigerlake/Kconfig
View File

@ -45,6 +45,7 @@ config CPU_SPECIFIC_OPTIONS
select SMP
select SOC_AHCI_PORT_IMPLEMENTED_INVERT
select PMC_GLOBAL_RESET_ENABLE_LOCK
select CPU_INTEL_COMMON_SMM
select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_BLOCK

11
src/soc/intel/tigerlake/smmrelocate.c
View File

@ -33,17 +33,6 @@
#include <soc/soc_chip.h>
#include <soc/systemagent.h>
/* This gets filled in and used during relocation. */
static struct smm_relocation_params smm_reloc_params;
static inline void write_smrr(struct smm_relocation_params *relo_params)
{
printk(BIOS_DEBUG, "Writing SMRR. base = 0x%08x, mask=0x%08x\n",
relo_params->smrr_base.lo, relo_params->smrr_mask.lo);
wrmsr(IA32_SMRR_PHYS_BASE, relo_params->smrr_base);
wrmsr(IA32_SMRR_PHYS_MASK, relo_params->smrr_mask);
}
static void update_save_state(int cpu, uintptr_t curr_smbase,
uintptr_t staggered_smbase,
struct smm_relocation_params *relo_params)