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This patch makes ITE Super I/O probing/dumping a little bit more generic, 

fixes minor coding style issues and prepares the table for supporting
more chips of the ITE IT87xx Super I/O family.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Carl-Daniel Hailfinger 2007-08-28 10:43:57 +00:00 committed by Uwe Hermann
parent 7a7890aced
commit b1786c2bce
1 changed files with 141 additions and 119 deletions
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170
util/probe_superio/probe_superio.c
View File

@ -35,22 +35,22 @@ char *familyid[] = {
unsigned char regval(unsigned short port, unsigned char reg) { unsigned char regval(unsigned short port, unsigned char reg) {
outb(reg, port); outb(reg, port);
return inb(port+1); return inb(port + 1);
} }
void regwrite(unsigned short port, unsigned char reg, unsigned char val) { void regwrite(unsigned short port, unsigned char reg, unsigned char val) {
outb(reg, port); outb(reg, port);
outb(val, port+1); outb(val, port + 1);
} }
void void
dump_ns8374(unsigned short port) { dump_ns8374(unsigned short port) {
printf("Enables: 21=%02x, 22=%02x, 23=%02x, 24=%02x, 26=%02x\n", printf("Enables: 21=%02x, 22=%02x, 23=%02x, 24=%02x, 26=%02x\n",
regval(port,0x21), regval(port,0x22), regval(port, 0x21), regval(port, 0x22), regval(port, 0x23),
regval(port,0x23), regval(port,0x24), regval(port,0x26)); regval(port, 0x24), regval(port, 0x26));
printf("SMBUS at %02x\n", regval(port, 0x2a)); printf("SMBUS at %02x\n", regval(port, 0x2a));
/* check COM1. This is all we care about at present. */ /* check COM1. This is all we care about at present. */
printf("COM 1 is Globally %s\n", regval(port,0x26)&8 ? "disabled" : "enabled"); printf("COM 1 is Globally %s\n", regval(port, 0x26) & 8 ? "disabled" : "enabled");
/* select com1 */ /* select com1 */
regwrite(port, 0x07, 0x03); regwrite(port, 0x07, 0x03);
printf("COM 1 is locally %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled"); printf("COM 1 is locally %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
@ -77,11 +77,11 @@ dump_fintek(unsigned short port, unsigned int did)
printf ("Fintek F71872\n"); printf ("Fintek F71872\n");
break; break;
default: default:
printf ("Unknown Fintek SuperIO: did=0x%04x\n",did); printf ("Unknown Fintek SuperI/O: did=0x%04x\n", did);
return; return;
} }
printf("Flash write is %s.\n", regval(port, 0x28)&0x80 ? "enabled" : "disabled"); printf("Flash write is %s.\n", regval(port, 0x28) & 0x80 ? "enabled" : "disabled");
printf("Flash control is 0x%04x.\n", regval(port, 0x28)); printf("Flash control is 0x%04x.\n", regval(port, 0x28));
printf("27=%02x\n", regval(port, 0x27)); printf("27=%02x\n", regval(port, 0x27));
printf("29=%02x\n", regval(port, 0x29)); printf("29=%02x\n", regval(port, 0x29));
@ -92,27 +92,27 @@ dump_fintek(unsigned short port, unsigned int did)
regwrite(port, 0x07, 0x01); regwrite(port, 0x07, 0x01);
printf("UART1 is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled"); printf("UART1 is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
printf("UART1 base=%02x%02x, irq=%02x, mode=%s\n", printf("UART1 base=%02x%02x, irq=%02x, mode=%s\n",
regval(port, 0x60), regval(port, 0x61), regval(port, 0x70)&0x0f, regval(port, 0x60), regval(port, 0x61), regval(port, 0x70) & 0x0f,
regval(port, 0xf0)&0x10 ? "RS485":"RS232"); regval(port, 0xf0) & 0x10 ? "RS485":"RS232");
/* select UART 2 */ /* select UART 2 */
regwrite(port, 0x07, 0x02); regwrite(port, 0x07, 0x02);
printf("UART2 is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled"); printf("UART2 is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
printf("UART2 base=%02x%02x, irq=%02x, mode=%s\n", printf("UART2 base=%02x%02x, irq=%02x, mode=%s\n",
regval(port, 0x60), regval(port, 0x61), regval(port, 0x70)&0x0f, regval(port, 0x60), regval(port, 0x61), regval(port, 0x70) & 0x0f,
regval(port, 0xf0)&0x10 ? "RS485":"RS232"); regval(port, 0xf0) & 0x10 ? "RS485":"RS232");
/* select Parport */ /* select Parport */
regwrite(port, 0x07, 0x03); regwrite(port, 0x07, 0x03);
printf("PARPORT is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled"); printf("PARPORT is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
printf("PARPORT base=%02x%02x, irq=%02x\n", printf("PARPORT base=%02x%02x, irq=%02x\n",
regval(port, 0x60), regval(port, 0x61), regval(port, 0x70)&0x0f); regval(port, 0x60), regval(port, 0x61), regval(port, 0x70) & 0x0f);
/* select hw monitor */ /* select hw monitor */
regwrite(port, 0x07, 0x04); regwrite(port, 0x07, 0x04);
printf("HW monitor is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled"); printf("HW monitor is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
printf("HW monitor base=%02x%02x, irq=%02x\n", printf("HW monitor base=%02x%02x, irq=%02x\n",
regval(port, 0x60), regval(port, 0x61), regval(port, 0x70)&0x0f); regval(port, 0x60), regval(port, 0x61), regval(port, 0x70) & 0x0f);
/* select gpio */ /* select gpio */
regwrite(port, 0x07, 0x05); regwrite(port, 0x07, 0x05);
@ -129,25 +129,39 @@ dump_fintek(unsigned short port, unsigned int did)
} }
//End Of Table /* End Of Table */
#define EOT -1 #define EOT -1
//NO LDN needed /* NO LDN needed */
#define NOLDN -2 #define NOLDN -2
//Not Available /* Not Available */
#define NANA -3 #define NANA -3
//Biggest LDN /* Maximum Name Length */
#define MAXNAMELEN 20
/* Biggest LDN */
#define MAXLDN 0xa #define MAXLDN 0xa
//MAXimum NUMber of Indexes /* biggestLDN + 0 + NOLDN + EOT */
#define LDNSIZE MAXLDN + 3
/* MAXimum NUMber of Indexes */
#define MAXNUMIDX 70 #define MAXNUMIDX 70
#define IDXSIZE MAXNUMIDX + 1
const static struct ite_registers { const static struct ite_registers {
signed short superio_id; //yes, it should be unsigned, but then EOT has to be positive /* yes, superio_id should be unsigned, but EOT has to be negative */
signed short superio_id;
char name[MAXNAMELEN];
struct ite_ldnidx { struct ite_ldnidx {
signed short ldn; signed short ldn;
signed short idx[MAXNUMIDX+1]; signed short idx[IDXSIZE];
signed short def[MAXNUMIDX+1]; signed short def[IDXSIZE];
} ldn[MAXLDN+3]; //biggestLDN+0+NOLDN+EOT } ldn[LDNSIZE];
} ite_reg_table[] = { } ite_reg_table[] = {
{0x8712,{ {0x8702, "IT8702", {
{EOT}}},
{0x8705, "IT8705 or IT8700", {
{EOT}}},
{0x8710, "IT8710", {
{EOT}}},
{0x8712, "IT8712", {
{NOLDN, {NOLDN,
{0x07,0x20,0x21,0x22,0x23,0x24,0x2b,EOT}, {0x07,0x20,0x21,0x22,0x23,0x24,0x2b,EOT},
{NANA,0x87,0x12,0x08,0x00,0x00,0x00,EOT}}, {NANA,0x87,0x12,0x08,0x00,0x00,0x00,EOT}},
@ -164,8 +178,10 @@ const static struct ite_registers {
{0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,EOT}, {0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,EOT},
{0x00,0x03,0x78,0x07,0x78,0x07,0x03,0x03,EOT}}, {0x00,0x03,0x78,0x07,0x78,0x07,0x03,0x03,EOT}},
{0x4, {0x4,
{0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,EOT}, {0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
{0x00,0x02,0x90,0x02,0x30,0x09,0x00,0x00,0x00,0x00,0x00,NANA,NANA,EOT}}, 0xf4,0xf5,0xf6,EOT},
{0x00,0x02,0x90,0x02,0x30,0x09,0x00,0x00,0x00,0x00,
0x00,NANA,NANA,EOT}},
{0x5, {0x5,
{0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT}, {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT},
{0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x00,EOT}}, {0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x00,EOT}},
@ -173,8 +189,18 @@ const static struct ite_registers {
{0x30,0x70,0x71,0xf0,EOT}, {0x30,0x70,0x71,0xf0,EOT},
{0x00,0x0c,0x02,0x00,EOT}}, {0x00,0x0c,0x02,0x00,EOT}},
{0x7, {0x7,
{0x25,0x26,0x27,0x28,0x29,0x2a,0x2c,0x60,0x61,0x62,0x63,0x64,0x65,0x70,0x71,0x72,0x73,0x74,0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xc0,0xc1,0xc2,0xc3,0xc4,0xc8,0xc9,0xca,0xcb,0xcc,0xe0,0xe1,0xe2,0xe3,0xe4,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,EOT}, {0x25,0x26,0x27,0x28,0x29,0x2a,0x2c,0x60,0x61,0x62,
{0x01,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x40,0x00,0x01,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,NANA,0x00,EOT}}, 0x63,0x64,0x65,0x70,0x71,0x72,0x73,0x74,0xb0,0xb1,
0xb2,0xb3,0xb4,0xb5,0xb8,0xb9,0xba,0xbb,0xbc,0xbd,
0xc0,0xc1,0xc2,0xc3,0xc4,0xc8,0xc9,0xca,0xcb,0xcc,
0xe0,0xe1,0xe2,0xe3,0xe4,0xf0,0xf1,0xf2,0xf3,0xf4,
0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,EOT},
{0x01,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x30,0x38,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x01,0x00,0x00,0x40,0x00,0x01,0x00,0x00,0x40,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,NANA,0x00,EOT}},
{0x8, {0x8,
{0x30,0x60,0x61,0x70,0xf0,EOT}, {0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x03,0x00,0x0a,0x00,EOT}}, {0x00,0x03,0x00,0x0a,0x00,EOT}},
@ -185,6 +211,10 @@ const static struct ite_registers {
{0x30,0x60,0x61,0x70,0xf0,EOT}, {0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x03,0x10,0x0b,0x00,EOT}}, {0x00,0x03,0x10,0x0b,0x00,EOT}},
{EOT}}}, {EOT}}},
{0x8716, "IT8716", {
{EOT}}},
{0x8718, "IT8718", {
{EOT}}},
{EOT} {EOT}
}; };
@ -204,33 +234,31 @@ dump_ite(unsigned short port, unsigned short id)
0x8708 -> IT8708 0x8708 -> IT8708
0x8710 -> IT8710 0x8710 -> IT8710
0x8712 -> IT8712 0x8712 -> IT8712
0x8716 -> IT8716 or IT8726 (identical except CPU voltage control) 0x8716 -> IT8716
0x8718 -> IT8718 0x8718 -> IT8718
0x8726 does not exist according to datasheet, but experience differs 0x8726 -> IT8726 (datasheet wrongly says 0x8716)
*/ */
switch(id) { switch(id) {
case 0x8702: case 0x8702:
printf ("IT8702\n");
break;
case 0x8705: case 0x8705:
printf ("IT8700 or IT8705\n");
break;
case 0x8710: case 0x8710:
printf ("IT8710\n");
break;
case 0x8712: case 0x8712:
printf ("IT8712\n"); case 0x8716:
case 0x8718:
for (i=0;; i++) { for (i=0;; i++) {
if (ite_reg_table[i].superio_id == EOT) if (ite_reg_table[i].superio_id == EOT)
break; break;
if ((unsigned short)ite_reg_table[i].superio_id != id) if ((unsigned short)ite_reg_table[i].superio_id != id)
continue; continue;
printf ("%s\n", ite_reg_table[i].name);
for (j=0;; j++) { for (j=0;; j++) {
if (ite_reg_table[i].ldn[j].ldn == EOT) if (ite_reg_table[i].ldn[j].ldn == EOT)
break; break;
if (ite_reg_table[i].ldn[j].ldn != NOLDN) { if (ite_reg_table[i].ldn[j].ldn != NOLDN) {
printf("switching to LDN 0x%01x\n", ite_reg_table[i].ldn[j].ldn); printf("switching to LDN 0x%01x\n",
regwrite(port, 0x07, ite_reg_table[i].ldn[j].ldn); ite_reg_table[i].ldn[j].ldn);
regwrite(port, 0x07,
ite_reg_table[i].ldn[j].ldn);
} }
idx = ite_reg_table[i].ldn[j].idx; idx = ite_reg_table[i].ldn[j].idx;
printf("idx "); printf("idx ");
@ -260,12 +288,6 @@ dump_ite(unsigned short port, unsigned short id)
} }
break; break;
case 0x8716:
printf ("IT8716 or IT8726\n");
break;
case 0x8718:
printf ("IT8718\n");
break;
default: default:
printf ("unknown ITE chip, id=%04x\n", id); printf ("unknown ITE chip, id=%04x\n", id);
for (i=0x20; i<=0x24; i++) for (i=0x20; i<=0x24; i++)
@ -280,15 +302,15 @@ probe_idregs_simple(unsigned short port){
outb(0x20, port); outb(0x20, port);
if (inb(port) != 0x20) { if (inb(port) != 0x20) {
if (inb(port) == 0xff ) if (inb(port) == 0xff )
printf ("No SuperIO chip found at 0x%04x\n", port); printf ("No SuperI/O chip found at 0x%04x\n", port);
else else
printf("probing 0x%04x, failed (0x%02x), data returns 0x%02x\n", printf("probing 0x%04x, failed (0x%02x), data returns 0x%02x\n",
port, inb(port), inb(port+1)); port, inb(port), inb(port + 1));
return; return;
} }
id = inb(port+1); id = inb(port + 1);
printf("SuperIO found at 0x%02x: id = 0x%02x\n", port, id); printf("SuperI/O found at 0x%02x: id = 0x%02x\n", port, id);
if (id == 0xff) if (id == 0xff)
return; return;
@ -312,40 +334,39 @@ void
probe_idregs_fintek(unsigned short port){ probe_idregs_fintek(unsigned short port){
unsigned int vid, did, success = 0; unsigned int vid, did, success = 0;
// Enable configuration sequence (Fintek uses this for example) /* Enable configuration sequence (Fintek uses this for example)
// Older ITE chips have the same enable sequence Older ITE chips have the same enable sequence */
outb(0x87, port); outb(0x87, port);
outb(0x87, port); outb(0x87, port);
//
outb(0x20, port); outb(0x20, port);
if (inb(port) != 0x20) { if (inb(port) != 0x20) {
if (inb(port) == 0xff ) if (inb(port) == 0xff )
printf ("No SuperIO chip found at 0x%04x\n", port); printf ("No SuperIO chip found at 0x%04x\n", port);
else else
printf("probing 0x%04x, failed (0x%02x), data returns 0x%02x\n", printf("probing 0x%04x, failed (0x%02x), data returns 0x%02x\n",
port, inb(port), inb(port+1)); port, inb(port), inb(port + 1));
return; return;
} }
did = inb(port+1); did = inb(port + 1);
did = did|(regval(port, 0x21)<<8); did |= (regval(port, 0x21)<<8);
vid = regval(port, 0x23); vid = regval(port, 0x23);
vid = vid|(regval(port, 0x24)<<8); vid |= (regval(port, 0x24)<<8);
printf("SuperIO found at 0x%02x: vid=0x%04x/did=0x%04x\n", port, vid, did); printf("SuperIO found at 0x%02x: vid=0x%04x/did=0x%04x\n", port, vid, did);
if (vid == 0xff || vid == 0xffff) if (vid == 0xff || vid == 0xffff)
return; return;
// printf("%s\n", familyid[id]); /* printf("%s\n", familyid[id]); */
switch(did) { switch(did) {
case 0x0887: // reversed for ITE8708 case 0x0887: /* pseudoreversed for ITE8708 */
case 0x1087: // reversed for ITE8710 case 0x1087: /* pseudoreversed for ITE8710 */
success = 1; success = 1;
dump_ite(port, ((did & 0xff) << 8) | ((did & 0xff00) >> 8)); dump_ite(port, ((did & 0xff) << 8) | ((did & 0xff00) >> 8));
// disable configuration /* disable configuration */
regwrite(port, 0x02, 0x02); regwrite(port, 0x02, 0x02);
break; break;
default: default:
@ -362,7 +383,7 @@ probe_idregs_fintek(unsigned short port){
if (!success) if (!success)
printf("no dump for vid 0x%04x, did 0x%04x\n", vid, did); printf("no dump for vid 0x%04x, did 0x%04x\n", vid, did);
// disable configuration (for Fintek, doesn't hurt ITE) /* disable configuration (for Fintek, doesn't hurt ITE) */
outb(0xaa, port); outb(0xaa, port);
} }
@ -370,12 +391,12 @@ void
probe_idregs_ite(unsigned short port){ probe_idregs_ite(unsigned short port){
unsigned int id, chipver; unsigned int id, chipver;
// Enable configuration sequence (ITE uses this for newer IT87[012]x) /* Enable configuration sequence (ITE uses this for newer IT87[012]x)
// IT871[01] uses 0x87, 0x87 -> fintek detection should handle it IT871[01] uses 0x87, 0x87 -> fintek detection should handle it
// IT8761 uses 0x87, 0x61, 0x55, 0x55/0xaa IT8761 uses 0x87, 0x61, 0x55, 0x55/0xaa
// IT86xx series uses different ports IT86xx series uses different ports
// IT8661 uses 0x86, 0x61, 0x55/0xaa, 0x55/0xaa and 32 more writes IT8661 uses 0x86, 0x61, 0x55/0xaa, 0x55/0xaa and 32 more writes
// IT8673 uses 0x86, 0x80, 0x55/0xaa, 0x55/0xaa and 32 more writes IT8673 uses 0x86, 0x80, 0x55/0xaa, 0x55/0xaa and 32 more writes */
outb(0x87, port); outb(0x87, port);
outb(0x01, port); outb(0x01, port);
outb(0x55, port); outb(0x55, port);
@ -384,23 +405,23 @@ probe_idregs_ite(unsigned short port){
else else
outb(0xAA, port); outb(0xAA, port);
// Read Chip ID Byte 1 /* Read Chip ID Byte 1 */
id = regval(port, 0x20); id = regval(port, 0x20);
if (id != 0x87) { if (id != 0x87) {
if (inb(port) == 0xff ) if (inb(port) == 0xff )
printf ("No SuperIO chip found at 0x%04x\n", port); printf ("No SuperIO chip found at 0x%04x\n", port);
else else
printf("probing 0x%04x, failed (0x%02x), data returns 0x%02x\n", printf("probing 0x%04x, failed (0x%02x), data returns 0x%02x\n",
port, inb(port), inb(port+1)); port, inb(port), inb(port + 1));
return; return;
} }
id <<= 8; id <<= 8;
// Read Chip ID Byte 2 /* Read Chip ID Byte 2 */
id |= regval(port, 0x21); id |= regval(port, 0x21);
// Read Chip Version, only bit 3..0 for all IT87xx /* Read Chip Version, only bit 3..0 for all IT87xx */
chipver = regval(port, 0x22) & 0x0f; chipver = regval(port, 0x22) & 0x0f;
/* ID Mapping Table /* ID Mapping Table
@ -410,26 +431,27 @@ probe_idregs_ite(unsigned short port){
0x8705 -> IT8700 or IT8705 0x8705 -> IT8700 or IT8705
0x8710 -> IT8710 0x8710 -> IT8710
0x8712 -> IT8712 0x8712 -> IT8712
0x8716 -> IT8716 or IT8726 (identical except CPU voltage control) 0x8716 -> IT8716
0x8718 -> IT8718 0x8718 -> IT8718
0x8726 -> IT8726 (datasheet wrongly says 0x8716)
*/ */
printf("ITE? SuperIO found at 0x%02x: id=0x%04x, chipver=0x%01x\n", printf("SuperI/O found at 0x%02x: id=0x%04x, chipver=0x%01x\n",
port, id, chipver); port, id, chipver);
switch(id) { switch(id) {
case 0x8702: case 0x8702:
case 0x8705: case 0x8705:
case 0x8710: //pointless, IT8710 has different enable sequence
case 0x8712: case 0x8712:
case 0x8716: case 0x8716:
case 0x8718: case 0x8718:
case 0x8726:
dump_ite(port, id); dump_ite(port, id);
break; break;
default: default:
printf("no dump for id 0x%04x\n", id); printf("no dump for id 0x%04x\n", id);
break; break;
} }
// disable configuration /* disable configuration */
regwrite(port, 0x02, 0x02); regwrite(port, 0x02, 0x02);
} }