This patch makes ITE Super I/O probing/dumping a little bit more generic,
fixes minor coding style issues and prepares the table for supporting more chips of the ITE IT87xx Super I/O family. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2750 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Carl-Daniel Hailfinger
Uwe Hermann
parent
7a7890aced
commit
b1786c2bce
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@ -46,8 +46,8 @@ void regwrite(unsigned short port, unsigned char reg, unsigned char val) {
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void
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dump_ns8374(unsigned short port) {
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printf("Enables: 21=%02x, 22=%02x, 23=%02x, 24=%02x, 26=%02x\n",
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regval(port,0x21), regval(port,0x22),
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regval(port,0x23), regval(port,0x24), regval(port,0x26));
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regval(port, 0x21), regval(port, 0x22), regval(port, 0x23),
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regval(port, 0x24), regval(port, 0x26));
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printf("SMBUS at %02x\n", regval(port, 0x2a));
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/* check COM1. This is all we care about at present. */
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printf("COM 1 is Globally %s\n", regval(port, 0x26) & 8 ? "disabled" : "enabled");
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@ -77,7 +77,7 @@ dump_fintek(unsigned short port, unsigned int did)
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printf ("Fintek F71872\n");
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break;
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default:
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printf ("Unknown Fintek SuperIO: did=0x%04x\n",did);
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printf ("Unknown Fintek SuperI/O: did=0x%04x\n", did);
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return;
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}
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@ -129,25 +129,39 @@ dump_fintek(unsigned short port, unsigned int did)
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}
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//End Of Table
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/* End Of Table */
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#define EOT -1
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//NO LDN needed
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/* NO LDN needed */
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#define NOLDN -2
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//Not Available
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/* Not Available */
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#define NANA -3
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//Biggest LDN
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/* Maximum Name Length */
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#define MAXNAMELEN 20
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/* Biggest LDN */
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#define MAXLDN 0xa
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//MAXimum NUMber of Indexes
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/* biggestLDN + 0 + NOLDN + EOT */
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#define LDNSIZE MAXLDN + 3
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/* MAXimum NUMber of Indexes */
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#define MAXNUMIDX 70
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#define IDXSIZE MAXNUMIDX + 1
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const static struct ite_registers {
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signed short superio_id; //yes, it should be unsigned, but then EOT has to be positive
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/* yes, superio_id should be unsigned, but EOT has to be negative */
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signed short superio_id;
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char name[MAXNAMELEN];
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struct ite_ldnidx {
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signed short ldn;
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signed short idx[MAXNUMIDX+1];
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signed short def[MAXNUMIDX+1];
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} ldn[MAXLDN+3]; //biggestLDN+0+NOLDN+EOT
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signed short idx[IDXSIZE];
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signed short def[IDXSIZE];
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} ldn[LDNSIZE];
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} ite_reg_table[] = {
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{0x8712,{
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{0x8702, "IT8702", {
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{EOT}}},
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{0x8705, "IT8705 or IT8700", {
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{EOT}}},
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{0x8710, "IT8710", {
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{EOT}}},
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{0x8712, "IT8712", {
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{NOLDN,
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{0x07,0x20,0x21,0x22,0x23,0x24,0x2b,EOT},
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{NANA,0x87,0x12,0x08,0x00,0x00,0x00,EOT}},
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@ -164,8 +178,10 @@ const static struct ite_registers {
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{0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,EOT},
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{0x00,0x03,0x78,0x07,0x78,0x07,0x03,0x03,EOT}},
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{0x4,
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{0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,EOT},
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{0x00,0x02,0x90,0x02,0x30,0x09,0x00,0x00,0x00,0x00,0x00,NANA,NANA,EOT}},
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{0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
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0xf4,0xf5,0xf6,EOT},
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{0x00,0x02,0x90,0x02,0x30,0x09,0x00,0x00,0x00,0x00,
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0x00,NANA,NANA,EOT}},
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{0x5,
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{0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT},
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{0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x00,EOT}},
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@ -173,8 +189,18 @@ const static struct ite_registers {
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{0x30,0x70,0x71,0xf0,EOT},
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{0x00,0x0c,0x02,0x00,EOT}},
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{0x7,
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{0x25,0x26,0x27,0x28,0x29,0x2a,0x2c,0x60,0x61,0x62,0x63,0x64,0x65,0x70,0x71,0x72,0x73,0x74,0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xc0,0xc1,0xc2,0xc3,0xc4,0xc8,0xc9,0xca,0xcb,0xcc,0xe0,0xe1,0xe2,0xe3,0xe4,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,EOT},
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{0x01,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x38,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x40,0x00,0x01,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,NANA,0x00,EOT}},
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{0x25,0x26,0x27,0x28,0x29,0x2a,0x2c,0x60,0x61,0x62,
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0x63,0x64,0x65,0x70,0x71,0x72,0x73,0x74,0xb0,0xb1,
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0xb2,0xb3,0xb4,0xb5,0xb8,0xb9,0xba,0xbb,0xbc,0xbd,
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0xc0,0xc1,0xc2,0xc3,0xc4,0xc8,0xc9,0xca,0xcb,0xcc,
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0xe0,0xe1,0xe2,0xe3,0xe4,0xf0,0xf1,0xf2,0xf3,0xf4,
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0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,EOT},
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{0x01,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,
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0x00,0x00,0x00,0x00,0x00,0x30,0x38,0x00,0x00,0x00,
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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0x01,0x00,0x00,0x40,0x00,0x01,0x00,0x00,0x40,0x00,
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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0x00,0x00,0x00,0x00,0x00,0x00,0x00,NANA,0x00,EOT}},
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{0x8,
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x00,0x03,0x00,0x0a,0x00,EOT}},
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@ -185,6 +211,10 @@ const static struct ite_registers {
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{0x30,0x60,0x61,0x70,0xf0,EOT},
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{0x00,0x03,0x10,0x0b,0x00,EOT}},
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{EOT}}},
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{0x8716, "IT8716", {
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{EOT}}},
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{0x8718, "IT8718", {
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{EOT}}},
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{EOT}
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};
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@ -204,33 +234,31 @@ dump_ite(unsigned short port, unsigned short id)
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0x8708 -> IT8708
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0x8710 -> IT8710
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0x8712 -> IT8712
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0x8716 -> IT8716 or IT8726 (identical except CPU voltage control)
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0x8716 -> IT8716
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0x8718 -> IT8718
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0x8726 does not exist according to datasheet, but experience differs
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0x8726 -> IT8726 (datasheet wrongly says 0x8716)
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*/
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switch(id) {
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case 0x8702:
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printf ("IT8702\n");
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break;
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case 0x8705:
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printf ("IT8700 or IT8705\n");
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break;
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case 0x8710:
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printf ("IT8710\n");
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break;
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case 0x8712:
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printf ("IT8712\n");
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case 0x8716:
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case 0x8718:
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for (i=0;; i++) {
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if (ite_reg_table[i].superio_id == EOT)
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break;
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if ((unsigned short)ite_reg_table[i].superio_id != id)
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continue;
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printf ("%s\n", ite_reg_table[i].name);
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for (j=0;; j++) {
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if (ite_reg_table[i].ldn[j].ldn == EOT)
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break;
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if (ite_reg_table[i].ldn[j].ldn != NOLDN) {
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printf("switching to LDN 0x%01x\n", ite_reg_table[i].ldn[j].ldn);
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regwrite(port, 0x07, ite_reg_table[i].ldn[j].ldn);
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printf("switching to LDN 0x%01x\n",
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ite_reg_table[i].ldn[j].ldn);
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regwrite(port, 0x07,
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ite_reg_table[i].ldn[j].ldn);
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}
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idx = ite_reg_table[i].ldn[j].idx;
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printf("idx ");
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@ -260,12 +288,6 @@ dump_ite(unsigned short port, unsigned short id)
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}
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break;
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case 0x8716:
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printf ("IT8716 or IT8726\n");
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break;
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case 0x8718:
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printf ("IT8718\n");
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break;
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default:
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printf ("unknown ITE chip, id=%04x\n", id);
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for (i=0x20; i<=0x24; i++)
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@ -280,7 +302,7 @@ probe_idregs_simple(unsigned short port){
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outb(0x20, port);
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if (inb(port) != 0x20) {
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if (inb(port) == 0xff )
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printf ("No SuperIO chip found at 0x%04x\n", port);
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printf ("No SuperI/O chip found at 0x%04x\n", port);
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else
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printf("probing 0x%04x, failed (0x%02x), data returns 0x%02x\n",
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port, inb(port), inb(port + 1));
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@ -288,7 +310,7 @@ probe_idregs_simple(unsigned short port){
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}
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id = inb(port + 1);
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printf("SuperIO found at 0x%02x: id = 0x%02x\n", port, id);
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printf("SuperI/O found at 0x%02x: id = 0x%02x\n", port, id);
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if (id == 0xff)
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return;
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@ -312,12 +334,11 @@ void
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probe_idregs_fintek(unsigned short port){
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unsigned int vid, did, success = 0;
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// Enable configuration sequence (Fintek uses this for example)
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// Older ITE chips have the same enable sequence
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/* Enable configuration sequence (Fintek uses this for example)
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Older ITE chips have the same enable sequence */
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outb(0x87, port);
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outb(0x87, port);
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//
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outb(0x20, port);
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if (inb(port) != 0x20) {
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if (inb(port) == 0xff )
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@ -329,23 +350,23 @@ probe_idregs_fintek(unsigned short port){
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}
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did = inb(port + 1);
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did = did|(regval(port, 0x21)<<8);
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did |= (regval(port, 0x21)<<8);
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vid = regval(port, 0x23);
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vid = vid|(regval(port, 0x24)<<8);
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vid |= (regval(port, 0x24)<<8);
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printf("SuperIO found at 0x%02x: vid=0x%04x/did=0x%04x\n", port, vid, did);
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if (vid == 0xff || vid == 0xffff)
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return;
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// printf("%s\n", familyid[id]);
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/* printf("%s\n", familyid[id]); */
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switch(did) {
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case 0x0887: // reversed for ITE8708
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case 0x1087: // reversed for ITE8710
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case 0x0887: /* pseudoreversed for ITE8708 */
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case 0x1087: /* pseudoreversed for ITE8710 */
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success = 1;
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dump_ite(port, ((did & 0xff) << 8) | ((did & 0xff00) >> 8));
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// disable configuration
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/* disable configuration */
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regwrite(port, 0x02, 0x02);
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break;
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default:
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@ -362,7 +383,7 @@ probe_idregs_fintek(unsigned short port){
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if (!success)
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printf("no dump for vid 0x%04x, did 0x%04x\n", vid, did);
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// disable configuration (for Fintek, doesn't hurt ITE)
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/* disable configuration (for Fintek, doesn't hurt ITE) */
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outb(0xaa, port);
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}
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@ -370,12 +391,12 @@ void
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probe_idregs_ite(unsigned short port){
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unsigned int id, chipver;
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// Enable configuration sequence (ITE uses this for newer IT87[012]x)
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// IT871[01] uses 0x87, 0x87 -> fintek detection should handle it
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// IT8761 uses 0x87, 0x61, 0x55, 0x55/0xaa
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// IT86xx series uses different ports
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// IT8661 uses 0x86, 0x61, 0x55/0xaa, 0x55/0xaa and 32 more writes
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// IT8673 uses 0x86, 0x80, 0x55/0xaa, 0x55/0xaa and 32 more writes
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/* Enable configuration sequence (ITE uses this for newer IT87[012]x)
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IT871[01] uses 0x87, 0x87 -> fintek detection should handle it
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IT8761 uses 0x87, 0x61, 0x55, 0x55/0xaa
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IT86xx series uses different ports
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IT8661 uses 0x86, 0x61, 0x55/0xaa, 0x55/0xaa and 32 more writes
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IT8673 uses 0x86, 0x80, 0x55/0xaa, 0x55/0xaa and 32 more writes */
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outb(0x87, port);
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outb(0x01, port);
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outb(0x55, port);
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@ -384,7 +405,7 @@ probe_idregs_ite(unsigned short port){
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else
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outb(0xAA, port);
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// Read Chip ID Byte 1
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/* Read Chip ID Byte 1 */
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id = regval(port, 0x20);
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if (id != 0x87) {
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if (inb(port) == 0xff )
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@ -397,10 +418,10 @@ probe_idregs_ite(unsigned short port){
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id <<= 8;
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// Read Chip ID Byte 2
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/* Read Chip ID Byte 2 */
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id |= regval(port, 0x21);
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// Read Chip Version, only bit 3..0 for all IT87xx
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/* Read Chip Version, only bit 3..0 for all IT87xx */
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chipver = regval(port, 0x22) & 0x0f;
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/* ID Mapping Table
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@ -410,26 +431,27 @@ probe_idregs_ite(unsigned short port){
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0x8705 -> IT8700 or IT8705
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0x8710 -> IT8710
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0x8712 -> IT8712
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0x8716 -> IT8716 or IT8726 (identical except CPU voltage control)
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0x8716 -> IT8716
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0x8718 -> IT8718
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0x8726 -> IT8726 (datasheet wrongly says 0x8716)
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*/
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printf("ITE? SuperIO found at 0x%02x: id=0x%04x, chipver=0x%01x\n",
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printf("SuperI/O found at 0x%02x: id=0x%04x, chipver=0x%01x\n",
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port, id, chipver);
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switch(id) {
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case 0x8702:
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case 0x8705:
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case 0x8710: //pointless, IT8710 has different enable sequence
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case 0x8712:
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case 0x8716:
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case 0x8718:
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case 0x8726:
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dump_ite(port, id);
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break;
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default:
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printf("no dump for id 0x%04x\n", id);
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break;
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}
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// disable configuration
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/* disable configuration */
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regwrite(port, 0x02, 0x02);
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}
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