mb/prodrive/hermes: Number Ethernet devices

The Prodrive Hermes mainboard has four i211 Ethernet NICs and an i210
Ethernet NIC, but their numbering isn't consistent with the PCIe root
port function numbers. With only a M.2 SSD plugged in, Linux uses the
following names:

 PHY 0 ---> enp6s0
 PHY 1 ---> enp4s0
 PHY 2 ---> enp3s0
 PHY 3 ---> enp1s0
 PHY 4 ---> enp2s0

These names change after adding or removing PCIe devices in slots
connected to root ports that get enumerated before the NICs' root
ports, because the assignment of secondary bus numbers depends on
the enumeration order. Because of this, the "predictable" network
interface names are not at all predictable, which is awful.

To avoid this, describe the NICs using SMBIOS Type41 entries with the
correct instance numbers. With this patch, Linux uses these names:

 PHY 0 ---> eno0
 PHY 1 ---> eno1
 PHY 2 ---> eno2
 PHY 3 ---> eno3
 PHY 4 ---> eno4

No matter what PCIe devices are present, these names don't change.

Change-Id: I7a527298f84172f9135006083ad7e748dcc27911
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58628
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/prodrive/hermes/Kconfig

@@ -14,6 +14,7 @@ config BOARD_PRODRIVE_HERMES_BASEBOARD
 	select INTEL_GMA_HAVE_VBT
 	select SOC_INTEL_COMMON_BLOCK_HDA_VERB
 	select ONBOARD_VGA_IS_PRIMARY
+	select SMBIOS_TYPE41_PROVIDED_BY_DEVTREE
 	select HAVE_ACPI_RESUME if !HERMES_USES_SPS_FIRMWARE
 	select DISABLE_ACPI_HIBERNATE if HERMES_USES_SPS_FIRMWARE
 

src/mainboard/prodrive/hermes/devicetree.cb

@@ -199,18 +199,30 @@ chip soc/intel/cannonlake
 		device pci 1c.4 on	# PCIe root port 5 (PHY 3)
 			register "PcieRpEnable[4]" = "1"
 			register "PcieRpLtrEnable[4]" = "1"
+			device pci 00.0 on
+				smbios_dev_info 3
+			end
 		end
 		device pci 1c.5 on	# PCIe root port 6 (PHY 4)
 			register "PcieRpEnable[5]" = "1"
 			register "PcieRpLtrEnable[5]" = "1"
+			device pci 00.0 on
+				smbios_dev_info 4
+			end
 		end
 		device pci 1c.6 on	# PCIe root port 7 (PHY 2)
 			register "PcieRpEnable[6]" = "1"
 			register "PcieRpLtrEnable[6]" = "1"
+			device pci 00.0 on
+				smbios_dev_info 2
+			end
 		end
 		device pci 1c.7 on	# PCIe root port 8 (PHY 1)
 			register "PcieRpEnable[7]" = "1"
 			register "PcieRpLtrEnable[7]" = "1"
+			device pci 00.0 on
+				smbios_dev_info 1
+			end
 		end
 		device pci 1d.0 on	# PCIe root port 9 (M2 M)
 			smbios_slot_desc "SlotTypePciExpressGen3X16" "SlotLengthOther" "M2 M" "SlotDataBusWidth4X"
@@ -221,6 +233,9 @@ chip soc/intel/cannonlake
 		device pci 1d.5 on	# PCIe root port 14 (PHY 0)
 			register "PcieRpEnable[13]" = "1"
 			register "PcieRpLtrEnable[13]" = "1"
+			device pci 00.0 on
+				smbios_dev_info 0
+			end
 		end
 		device pci 1d.6 on	# PCIe root port 15 (BMC)
 			device pci 00.0 on	# Aspeed PCI Bridge