soc/intel/alderlake: Add GFx Device ID 0x46a6

This CL adds support for new ADL graphics Device ID 0x46a6.

TEST=Build and boot Adlrvp board

Change-Id: I8ca875c7faf2997d207aff9e292f94a3b6311e94
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56026
Reviewed-by: Meera Ravindranath <meera.ravindranath@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/include/device/pci_ids.h

@@ -3818,6 +3818,7 @@
 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_3			0x46a3
 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_4			0x46a8
 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_5			0x46b3
+#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_6			0x46a6
 #define PCI_DEVICE_ID_INTEL_ADL_S_GT1			0x4680
 #define PCI_DEVICE_ID_INTEL_ADL_M_GT1			0x46c0
 

src/soc/intel/alderlake/bootblock/report_platform.c

@@ -105,6 +105,7 @@ static struct {
 	{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_3, "Alderlake P GT2" },
 	{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_4, "Alderlake P GT2" },
 	{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_5, "Alderlake P GT2" },
+	{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_6, "Alderlake P GT2" },
 	{ PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" },
 };
 

src/soc/intel/common/block/graphics/graphics.c

@@ -301,6 +301,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_ADL_P_GT2_3,
 	PCI_DEVICE_ID_INTEL_ADL_P_GT2_4,
 	PCI_DEVICE_ID_INTEL_ADL_P_GT2_5,
+	PCI_DEVICE_ID_INTEL_ADL_P_GT2_6,
 	PCI_DEVICE_ID_INTEL_ADL_S_GT1,
 	PCI_DEVICE_ID_INTEL_ADL_M_GT1,
 	0,