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cpu/x86/smm: Define APM_CNT_ROUTE_ALL_XHCI 

Change-Id: I0bc321f499278e0cdbfb40be9a2b2ae21828d2f4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42619
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Kyösti Mälkki 2020-06-18 14:05:35 +03:00 committed by Patrick Georgi
parent 933f90147b
commit b486f29a44
3 changed files with 4 additions and 3 deletions
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1
src/include/cpu/x86/smm.h
View File

@ -24,6 +24,7 @@
#define APM_CNT_ACPI_ENABLE 0xe1
#define APM_CNT_MBI_UPDATE 0xeb
#define APM_CNT_GNVS_UPDATE 0xea
#define APM_CNT_ROUTE_ALL_XHCI 0xca
#define APM_CNT_FINALIZE 0xcb
#define APM_CNT_LEGACY 0xcc
#define APM_CNT_SMMINFO 0xec

2
src/southbridge/intel/lynxpoint/smihandler.c
View File

@ -330,7 +330,7 @@ static void southbridge_smi_apmc(void)
printk(BIOS_DEBUG, "SMI#: Setting GNVS to %p\n", gnvs);
}
break;
case 0xca:
case APM_CNT_ROUTE_ALL_XHCI:
usb_xhci_route_all();
break;
case APM_CNT_ELOG_GSMI:

4
src/southbridge/intel/lynxpoint/usb_xhci.c
View File

@ -1,10 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <cpu/x86/smm.h>
#include <delay.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <arch/io.h>
#include <device/mmio.h>
#include <device/pci_ops.h>
#include "chip.h"
@ -356,7 +356,7 @@ static void usb_xhci_init(struct device *dev)
usb_xhci_reset_usb3(dev, 0);
} else if (config->xhci_default) {
/* Route all ports to XHCI */
outb(0xca, 0xb2);
apm_control(APM_CNT_ROUTE_ALL_XHCI);
}
}