drivers/intel/fsp2_0: move common cbmem_top_chipset to fsp driver
The common cbmem_top_chipset implementation uses the FSP bootloader HOB, thus move it to the fsp driver which is a more appropriate place. Change-Id: I914df51a7414eb72416f816ff8375a13d5716925 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36620 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: David Guckian Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
parent
46e68ac99a
commit
b8cd4b0049
|
@ -22,6 +22,7 @@ romstage-$(CONFIG_VERIFY_HOBS) += hob_verify.c
|
||||||
romstage-y += util.c
|
romstage-y += util.c
|
||||||
romstage-y += memory_init.c
|
romstage-y += memory_init.c
|
||||||
romstage-$(CONFIG_MMA) += mma_core.c
|
romstage-$(CONFIG_MMA) += mma_core.c
|
||||||
|
romstage-y += cbmem.c
|
||||||
|
|
||||||
ramstage-y += debug.c
|
ramstage-y += debug.c
|
||||||
ramstage-$(CONFIG_RUN_FSP_GOP) += graphics.c
|
ramstage-$(CONFIG_RUN_FSP_GOP) += graphics.c
|
||||||
|
|
|
@ -84,7 +84,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||||
select SOC_INTEL_COMMON_BLOCK_SRAM
|
select SOC_INTEL_COMMON_BLOCK_SRAM
|
||||||
select SOC_INTEL_COMMON_BLOCK_RTC
|
select SOC_INTEL_COMMON_BLOCK_RTC
|
||||||
select SOC_INTEL_COMMON_BLOCK_SA
|
select SOC_INTEL_COMMON_BLOCK_SA
|
||||||
select SOC_INTEL_COMMON_BLOCK_SA_FSP_TOLUM
|
|
||||||
select SOC_INTEL_COMMON_BLOCK_SCS
|
select SOC_INTEL_COMMON_BLOCK_SCS
|
||||||
select SOC_INTEL_COMMON_BLOCK_TIMER
|
select SOC_INTEL_COMMON_BLOCK_TIMER
|
||||||
select SOC_INTEL_COMMON_BLOCK_TCO
|
select SOC_INTEL_COMMON_BLOCK_TCO
|
||||||
|
|
|
@ -88,7 +88,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||||
select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
|
select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
|
||||||
select SOC_INTEL_COMMON_BLOCK_CPU
|
select SOC_INTEL_COMMON_BLOCK_CPU
|
||||||
select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
|
select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
|
||||||
select SOC_INTEL_COMMON_BLOCK_SA_FSP_TOLUM
|
|
||||||
select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT
|
select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT
|
||||||
select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
|
select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
|
||||||
select SOC_INTEL_COMMON_BLOCK_HDA
|
select SOC_INTEL_COMMON_BLOCK_HDA
|
||||||
|
|
|
@ -3,12 +3,6 @@ config SOC_INTEL_COMMON_BLOCK_SA
|
||||||
help
|
help
|
||||||
Intel Processor common System Agent support
|
Intel Processor common System Agent support
|
||||||
|
|
||||||
config SOC_INTEL_COMMON_BLOCK_SA_FSP_TOLUM
|
|
||||||
bool
|
|
||||||
help
|
|
||||||
Select this if you want cbmem_top_chipset use the TOLUM returned
|
|
||||||
by the FSP HOB.
|
|
||||||
|
|
||||||
config MMCONF_BASE_ADDRESS
|
config MMCONF_BASE_ADDRESS
|
||||||
hex
|
hex
|
||||||
default 0xe0000000
|
default 0xe0000000
|
||||||
|
|
|
@ -6,4 +6,3 @@ ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += systemagent.c
|
||||||
romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += memmap.c
|
romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += memmap.c
|
||||||
ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += memmap.c
|
ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += memmap.c
|
||||||
postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += memmap.c
|
postcar-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA) += memmap.c
|
||||||
romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SA_FSP_TOLUM) += cbmem.c
|
|
||||||
|
|
|
@ -47,7 +47,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||||
select SOC_INTEL_COMMON_BLOCK_PMC
|
select SOC_INTEL_COMMON_BLOCK_PMC
|
||||||
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
|
select ACPI_INTEL_HARDWARE_SLEEP_VALUES
|
||||||
# select SOC_INTEL_COMMON_BLOCK_SA
|
# select SOC_INTEL_COMMON_BLOCK_SA
|
||||||
select SOC_INTEL_COMMON_BLOCK_SA_FSP_TOLUM
|
|
||||||
select SOC_INTEL_COMMON_BLOCK_FAST_SPI
|
select SOC_INTEL_COMMON_BLOCK_FAST_SPI
|
||||||
select SOC_INTEL_COMMON_BLOCK_GPIO
|
select SOC_INTEL_COMMON_BLOCK_GPIO
|
||||||
select SOC_INTEL_COMMON_BLOCK_PCR
|
select SOC_INTEL_COMMON_BLOCK_PCR
|
||||||
|
|
|
@ -43,7 +43,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||||
select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
|
select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
|
||||||
select SOC_INTEL_COMMON_BLOCK_CPU
|
select SOC_INTEL_COMMON_BLOCK_CPU
|
||||||
select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
|
select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
|
||||||
select SOC_INTEL_COMMON_BLOCK_SA_FSP_TOLUM
|
|
||||||
select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
|
select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
|
||||||
select SOC_INTEL_COMMON_BLOCK_HDA
|
select SOC_INTEL_COMMON_BLOCK_HDA
|
||||||
select SOC_INTEL_COMMON_BLOCK_SA
|
select SOC_INTEL_COMMON_BLOCK_SA
|
||||||
|
|
|
@ -32,8 +32,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||||
select PLATFORM_USES_FSP2_0
|
select PLATFORM_USES_FSP2_0
|
||||||
select SOC_INTEL_COMMON
|
select SOC_INTEL_COMMON
|
||||||
select SOC_INTEL_COMMON_RESET
|
select SOC_INTEL_COMMON_RESET
|
||||||
select SOC_INTEL_COMMON_BLOCK
|
|
||||||
select SOC_INTEL_COMMON_BLOCK_SA_FSP_TOLUM
|
|
||||||
select SOC_SETS_MSRS
|
select SOC_SETS_MSRS
|
||||||
select SPI_FLASH
|
select SPI_FLASH
|
||||||
select UART_OVERRIDE_REFCLK
|
select UART_OVERRIDE_REFCLK
|
||||||
|
|
|
@ -58,7 +58,6 @@ config CPU_SPECIFIC_OPTIONS
|
||||||
select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
|
select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG
|
||||||
select SOC_INTEL_COMMON_BLOCK_CPU
|
select SOC_INTEL_COMMON_BLOCK_CPU
|
||||||
select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
|
select SOC_INTEL_COMMON_BLOCK_CPU_MPINIT
|
||||||
select SOC_INTEL_COMMON_BLOCK_SA_FSP_TOLUM
|
|
||||||
select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT
|
select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT
|
||||||
select SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS
|
select SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS
|
||||||
select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL
|
select SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL
|
||||||
|
|
Loading…
Reference in New Issue