mb/google/dedede: Configure VCCIOSEL for EN_SPKR GPIO Pad

Realtek speaker amplifiers under auto mode operation have Absolute Max
Rating (AMR) at 1.98 V. Hence probe the firmware config for speaker
amplifier and program the VCCIOSEL accordingly.

BUG=b:194120188
TEST=Build and boot to OS in Storo. Ensure that the VCCIO selection is
configured as expected and probing the GPIO reads the configured
voltage.

Change-Id: Ibd3bc90bd0bbc9a35922b29e3d1e106321bc7a06
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56616
Reviewed-by: Evan Green <evgreen@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/google/dedede/Makefile.inc

@@ -9,6 +9,7 @@ ramstage-$(CONFIG_CHROMEOS) += chromeos.c
 ramstage-y += mainboard.c
 ramstage-y += ec.c
 ramstage-y += board_info.c
+ramstage-y += fw_config.c
 
 VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR))
 

src/mainboard/google/dedede/fw_config.c

@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <arch/mmio.h>
+#include <bootstate.h>
+#include <console/console.h>
+#include <fw_config.h>
+#include <gpio.h>
+#include <intelblocks/gpio.h>
+
+#define PAD_CFG_DW2_OFFSET	(2 * sizeof(uint32_t))
+#define VCCIOSEL_1V8		(1 << 8)
+
+static void fw_config_handle(void *unused)
+{
+	void *pad_conf_offset = gpio_dwx_address(GPP_D17) + PAD_CFG_DW2_OFFSET;
+	uint32_t pad_conf = read32(pad_conf_offset);
+
+	if (fw_config_probe(FW_CONFIG(AUDIO_AMP, RT1015P_AUTO))) {
+		pad_conf |= VCCIOSEL_1V8;
+		write32(pad_conf_offset, pad_conf);
+	}
+}
+BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);