mb/google/dedede: Configure VCCIOSEL for EN_SPKR GPIO Pad
Realtek speaker amplifiers under auto mode operation have Absolute Max Rating (AMR) at 1.98 V. Hence probe the firmware config for speaker amplifier and program the VCCIOSEL accordingly. BUG=b:194120188 TEST=Build and boot to OS in Storo. Ensure that the VCCIO selection is configured as expected and probing the GPIO reads the configured voltage. Change-Id: Ibd3bc90bd0bbc9a35922b29e3d1e106321bc7a06 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56616 Reviewed-by: Evan Green <evgreen@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -9,6 +9,7 @@ ramstage-$(CONFIG_CHROMEOS) += chromeos.c
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ramstage-y += mainboard.c
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ramstage-y += mainboard.c
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ramstage-y += ec.c
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ramstage-y += ec.c
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ramstage-y += board_info.c
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ramstage-y += board_info.c
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ramstage-y += fw_config.c
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VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR))
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VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR))
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@ -0,0 +1,23 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <arch/mmio.h>
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#include <bootstate.h>
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#include <console/console.h>
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#include <fw_config.h>
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#include <gpio.h>
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#include <intelblocks/gpio.h>
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#define PAD_CFG_DW2_OFFSET (2 * sizeof(uint32_t))
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#define VCCIOSEL_1V8 (1 << 8)
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static void fw_config_handle(void *unused)
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{
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void *pad_conf_offset = gpio_dwx_address(GPP_D17) + PAD_CFG_DW2_OFFSET;
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uint32_t pad_conf = read32(pad_conf_offset);
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if (fw_config_probe(FW_CONFIG(AUDIO_AMP, RT1015P_AUTO))) {
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pad_conf |= VCCIOSEL_1V8;
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write32(pad_conf_offset, pad_conf);
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}
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}
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BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);
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