pciexp_device: Properly search for Intel's 0xcafe capability

We have this quirk in our tree since the introduction of L1-substate
support[1]. The way we searched for this capability was rather crude:
We simply assumed that it would show up in the first data word of
another capability.

As it turned out that it is actually a proper vendor-specific capa-
bility that we are looking for, we can drop some of the mystic code.
This was confirmed to work on the device that was originally used
during development, Google/Samus.

[1] commit 31c6e632cf (PCIe: Add L1 Sub-State support.)

Change-Id: I886fb96e9a92387bc0e2a7feb746f7842cee5476
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66455
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

src/device/pciexp_device.c

@@ -5,6 +5,7 @@
 #include <delay.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/pci_ids.h>
 #include <device/pci_ops.h>
 #include <device/pciexp.h>
 
@@ -387,7 +388,10 @@ static void pciexp_config_L1_sub_state(struct device *root, struct device *dev)
 
 	end_cap = pciexp_find_extended_cap(dev, PCIE_EXT_CAP_L1SS_ID, 0);
 	if (!end_cap) {
-		end_cap = pciexp_find_extended_cap(dev, 0xcafe, 0);
+		if (dev->vendor != PCI_VID_INTEL)
+			return;
+
+		end_cap = pciexp_find_ext_vendor_cap(dev, 0xcafe, 0);
 		if (!end_cap)
 			return;
 	}