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cpu/x86/smm: Use common SMM_ASEG region 

Change-Id: Idca56583c1c8dc41ad11d915ec3e8be781fb4e48
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69665
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Kyösti Mälkki 2022-11-11 19:46:05 +02:00
parent 2d4c2b9850
commit bbba201165
5 changed files with 15 additions and 16 deletions
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4
src/cpu/x86/smm/Makefile.inc
View File

@ -29,14 +29,10 @@ endif
smm-y += save_state.c
ifeq ($(CONFIG_SMM_TSEG),y)
ramstage-y += tseg_region.c
romstage-y += tseg_region.c
postcar-y += tseg_region.c
endif
ifeq ($(CONFIG_PARALLEL_MP),y)
smmstub-y += smm_stub.S

5
src/cpu/x86/smm/smm_module_loader.c
View File

@ -409,11 +409,6 @@ static int append_and_check_region(const struct region smram,
int smm_load_module(const uintptr_t smram_base, const size_t smram_size,
struct smm_loader_params *params)
{
if (CONFIG(SMM_ASEG) && (smram_base != SMM_BASE || smram_size != SMM_CODE_SEGMENT_SIZE)) {
printk(BIOS_ERR, "SMM base & size are 0x%lx, 0x%zx, but must be 0x%x, 0x%x\n",
smram_base, smram_size, SMM_BASE, SMM_CODE_SEGMENT_SIZE);
return -1;
}
/*
* Place in .bss to reduce stack usage.
* TODO: once CPU_INFO_V2 is used everywhere, use smaller stack for APs and move

7
src/cpu/x86/smm/tseg_region.c
View File

@ -26,7 +26,12 @@ int smm_subregion(int sub, uintptr_t *start, size_t *size)
const size_t ied_size = CONFIG_IED_REGION_SIZE;
const size_t cache_size = CONFIG_SMM_RESERVED_SIZE;
smm_region(&sub_base, &sub_size);
if (CONFIG(SMM_TSEG))
smm_region(&sub_base, &sub_size);
else if (CONFIG(SMM_ASEG))
aseg_region(&sub_base, &sub_size);
else
return -1;
ASSERT(IS_ALIGNED(sub_base, sub_size));
ASSERT(sub_size > (cache_size + ied_size));

6
src/include/cpu/x86/smm.h
View File

@ -165,6 +165,12 @@ void restore_default_smm_area(void *smm_save_area);
*/
void smm_region(uintptr_t *start, size_t *size);
static inline void aseg_region(uintptr_t *start, size_t *size)
{
*start = SMM_BASE;
*size = SMM_DEFAULT_SIZE; /* SMM_CODE_SEGMENT_SIZE ? */
}
enum {
/* SMM handler area. */
SMM_SUBREGION_HANDLER,

9
src/mainboard/emulation/qemu-q35/cpu.c
View File

@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <commonlib/helpers.h>
#include <console/console.h>
#include <cpu/amd/amd64_save_state.h>
#include <cpu/intel/smm_reloc.h>
@ -15,14 +16,10 @@ static void get_smm_info(uintptr_t *perm_smbase, size_t *perm_smsize,
{
printk(BIOS_DEBUG, "Setting up SMI for CPU\n");
if (CONFIG(SMM_TSEG))
smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize);
smm_subregion(SMM_SUBREGION_HANDLER, perm_smbase, perm_smsize);
if (CONFIG(SMM_ASEG)) {
if (CONFIG(SMM_ASEG))
smm_open_aseg();
*perm_smbase = 0xa0000;
*perm_smsize = 0x10000;
}
/* FIXME: on X86_64 the save state size is smaller than the size of the SMM stub */
*smm_save_state_size = sizeof(amd64_smm_state_save_area_t);