soc/intel/{skl,apl}: don't run or even include SGX code if disabled

Do not run or include any code in case the user did not explicitly
enable SGX through `SOC_INTEL_COMMON_BLOCK_SGX_ENABLE`.

Also move the ifdef inside the ASL file.

Change-Id: Iec4d3d3eb2811ec14d29aff9601ba325724bc28c
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58426
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>

src/soc/intel/apollolake/acpi.c

@@ -88,7 +88,7 @@ void soc_fill_gnvs(struct global_nvs *gnvs)
 		gnvs->scdo = gpio_acpi_pin(cfg->sdcard_cd_gpio);
 	}
 
-	if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX))
+	if (CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE))
 		sgx_fill_gnvs(gnvs);
 
 	/* Fill in Above 4GB MMIO resource */

src/soc/intel/apollolake/acpi/southbridge.asl

@@ -30,6 +30,4 @@
 #include <soc/intel/common/acpi/pci_osc.asl>
 
 /* SGX */
-#if CONFIG(SOC_INTEL_COMMON_BLOCK_SGX)
 #include <soc/intel/common/acpi/sgx.asl>
-#endif

src/soc/intel/common/acpi/sgx.asl

@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#if CONFIG(SOC_INTEL_COMMON_BLOCK_SGX_ENABLE)
 Scope(\_SB)
 {
 	// Secure Enclave memory
@@ -54,3 +55,4 @@ Scope(\_SB)
 
 	} // end EPC Device
 } // End of Scope(\_SB)
+#endif

src/soc/intel/common/block/sgx/Makefile.inc

@@ -1 +1 @@
-ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX) += sgx.c
+ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_SGX_ENABLE) += sgx.c

src/soc/intel/skylake/acpi/pch.asl

@@ -62,6 +62,4 @@ Method (_OSC, 4)
 }
 
 /* SGX */
-#if CONFIG(SOC_INTEL_COMMON_BLOCK_SGX)
 #include <soc/intel/common/acpi/sgx.asl>
-#endif