nb/intel/sandybridge: Lock PAVPC
This makes CHIPSEC happy. We don't enable PAVP, but it shouldn't hurt to lock it nevertheless. Change-Id: I9428f0b6e8868832eb79f7aea24cbc7961c2aa8f Signed-off-by: Dennis Wassenberg <dennis.wassenberg@secunet.com> Reviewed-on: https://review.coreboot.org/17352 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
parent
0c04720cb7
commit
bd202bcdf3
|
@ -23,6 +23,7 @@
|
|||
void intel_sandybridge_finalize_smm(void)
|
||||
{
|
||||
pci_or_config16(PCI_DEV_SNB, 0x50, 1 << 0); /* GGC */
|
||||
pci_or_config16(PCI_DEV_SNB, 0x58, 1 << 2); /* PAVP Lock */
|
||||
pci_or_config32(PCI_DEV_SNB, 0x5c, 1 << 0); /* DPR */
|
||||
pci_or_config32(PCI_DEV_SNB, 0x78, 1 << 10); /* ME */
|
||||
pci_or_config32(PCI_DEV_SNB, 0x90, 1 << 0); /* REMAPBASE */
|
||||
|
|
Loading…
Reference in New Issue