soc/intel/gma: Implement fsp_soc_get_igd_bar() in common code
`fsp/util.h` draws incompatible UDK headers in. Hence, we have to declare it locally again. Change-Id: Iaa5981088eeb5c36f765d6332ae47a38a6a4c875 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40729 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -54,7 +54,6 @@ ramstage-y += cpu.c
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ramstage-y += chip.c
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ramstage-y += cse.c
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ramstage-y += elog.c
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ramstage-y += graphics.c
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ramstage-y += gspi.c
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ramstage-y += heci.c
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ramstage-y += i2c.c
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@ -1,10 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <fsp/util.h>
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#include <intelblocks/graphics.h>
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#include <types.h>
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uintptr_t fsp_soc_get_igd_bar(void)
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{
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return graphics_get_memory_base();
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}
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@ -36,7 +36,6 @@ ramstage-y += cpu.c
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ramstage-y += elog.c
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ramstage-y += finalize.c
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ramstage-y += fsp_params.c
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ramstage-y += graphics.c
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ramstage-y += gspi.c
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ramstage-y += i2c.c
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ramstage-y += lockdown.c
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@ -1,13 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <acpi/acpi.h>
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#include <fsp/util.h>
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#include <device/device.h>
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#include <drivers/intel/gma/i915_reg.h>
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#include <intelblocks/graphics.h>
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#include <types.h>
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uintptr_t fsp_soc_get_igd_bar(void)
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{
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return graphics_get_memory_base();
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}
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@ -12,6 +12,7 @@
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#include <drivers/intel/gma/opregion.h>
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#include <intelblocks/graphics.h>
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#include <soc/pci_devs.h>
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#include <types.h>
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/* SoC Overrides */
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__weak void graphics_soc_init(struct device *dev)
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@ -154,6 +155,16 @@ void graphics_gtt_rmw(unsigned long reg, uint32_t andmask, uint32_t ormask)
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graphics_gtt_write(reg, val);
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}
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/*
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* fsp_soc_get_igd_bar() is declared in <fsp/util.h>,
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* but that draws incompatible UDK headers in.
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*/
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uintptr_t fsp_soc_get_igd_bar(void);
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uintptr_t fsp_soc_get_igd_bar(void)
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{
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return graphics_get_memory_base();
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}
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static const struct device_operations graphics_ops = {
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.read_resources = pci_dev_read_resources,
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.set_resources = pci_dev_set_resources,
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@ -35,7 +35,6 @@ ramstage-y += espi.c
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ramstage-y += finalize.c
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ramstage-y += fsp_params.c
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ramstage-y += gpio.c
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ramstage-y += graphics.c
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ramstage-y += lockdown.c
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ramstage-y += p2sb.c
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ramstage-y += pmc.c
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@ -1,10 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <fsp/util.h>
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#include <intelblocks/graphics.h>
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#include <types.h>
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uintptr_t fsp_soc_get_igd_bar(void)
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{
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return graphics_get_memory_base();
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}
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@ -36,7 +36,6 @@ ramstage-y += espi.c
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ramstage-y += finalize.c
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ramstage-y += fsp_params.c
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ramstage-y += gpio.c
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ramstage-y += graphics.c
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ramstage-y += lockdown.c
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ramstage-y += p2sb.c
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ramstage-y += pmc.c
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@ -1,10 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <fsp/util.h>
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#include <intelblocks/graphics.h>
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#include <types.h>
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uintptr_t fsp_soc_get_igd_bar(void)
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{
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return graphics_get_memory_base();
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}
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@ -10,11 +10,6 @@
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#include <soc/ramstage.h>
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#include <types.h>
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uintptr_t fsp_soc_get_igd_bar(void)
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{
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return graphics_get_memory_base();
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}
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void graphics_soc_init(struct device *dev)
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{
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struct soc_intel_skylake_config *conf = config_of(dev);
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@ -36,7 +36,6 @@ ramstage-y += espi.c
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ramstage-y += finalize.c
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ramstage-y += fsp_params.c
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ramstage-y += gpio.c
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ramstage-y += graphics.c
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ramstage-y += lockdown.c
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ramstage-y += p2sb.c
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ramstage-y += pmc.c
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@ -1,16 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* This file is created based on Intel Tiger Lake Processor SA Datasheet
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* Document number: 571131
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* Chapter number: 4
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*/
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#include <fsp/util.h>
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#include <intelblocks/graphics.h>
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#include <types.h>
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uintptr_t fsp_soc_get_igd_bar(void)
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{
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return graphics_get_memory_base();
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}
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