soc/amd/common/psp: Check more error bits before SPL fusing
This adds checks for three more error bits before requesting that the SPL fuses are updated. - While I'm here, I'm adding the include of types.h which was previously done through other include files, but should be done independently. Signed-off-by: Martin Roth <gaumless@gmail.com> Change-Id: I87a7d40850c4e9ddbb2d1913c1588a919fdb29d2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73518 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
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@ -3,6 +3,7 @@
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#include <bootstate.h>
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#include <bootstate.h>
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#include <console/console.h>
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#include <console/console.h>
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#include <timer.h>
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#include <timer.h>
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#include <types.h>
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#include <amdblocks/psp.h>
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#include <amdblocks/psp.h>
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#include <amdblocks/smn.h>
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#include <amdblocks/smn.h>
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#include "psp_def.h"
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#include "psp_def.h"
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@ -13,6 +14,9 @@
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#define CORE_2_PSP_MSG_38_OFFSET 0x10998 /* 4 byte */
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#define CORE_2_PSP_MSG_38_OFFSET 0x10998 /* 4 byte */
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#define CORE_2_PSP_MSG_38_FUSE_SPL BIT(12)
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#define CORE_2_PSP_MSG_38_FUSE_SPL BIT(12)
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#define CORE_2_PSP_MSG_38_SPL_FUSE_ERROR BIT(13)
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#define CORE_2_PSP_MSG_38_SPL_ENTRY_ERROR BIT(14)
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#define CORE_2_PSP_MSG_38_SPL_ENTRY_MISSING BIT(15)
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union pspv2_mbox_command {
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union pspv2_mbox_command {
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u32 val;
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u32 val;
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@ -131,6 +135,22 @@ void psp_set_spl_fuse(void *unused)
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return;
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return;
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}
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}
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if (c2p38 & CORE_2_PSP_MSG_38_SPL_FUSE_ERROR) {
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printk(BIOS_ERR, "PSP: SPL Table does not meet fuse requirements.\n");
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return;
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}
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if (c2p38 & CORE_2_PSP_MSG_38_SPL_ENTRY_ERROR) {
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printk(BIOS_ERR, "PSP: Critical SPL entry missing or current firmware does"
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" not meet requirements.\n");
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return;
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}
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if (c2p38 & CORE_2_PSP_MSG_38_SPL_ENTRY_MISSING) {
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printk(BIOS_ERR, "PSP: Table of critical SPL values is missing.\n");
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return;
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}
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if (!CONFIG(SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL))
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if (!CONFIG(SOC_AMD_COMMON_BLOCK_PSP_FUSE_SPL))
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return;
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return;
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