GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

nb/intel/common/gma_opregion: Use new method to update ASLS 

Use new GMA driver method to set ASLS.

Change-Id: I872ff86a778497df76ad7f9b1b6910c4e7c5941f
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/20283
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Patrick Rudolph 2017-06-20 17:54:53 +02:00
parent fa47042e1c
commit bdae93571b
1 changed files with 2 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

15
src/northbridge/intel/common/gma_opregion.c
View File

@ -79,8 +79,6 @@ static enum cb_err init_opregion_vbt(igd_opregion_t *opregion)
enum cb_err init_igd_opregion(igd_opregion_t *opregion) enum cb_err init_igd_opregion(igd_opregion_t *opregion)
{ {
enum cb_err ret; enum cb_err ret;
device_t igd;
u16 reg16;
memset((void *)opregion, 0, sizeof(igd_opregion_t)); memset((void *)opregion, 0, sizeof(igd_opregion_t));
@ -119,17 +117,8 @@ enum cb_err init_igd_opregion(igd_opregion_t *opregion)
if (ret != CB_SUCCESS) if (ret != CB_SUCCESS)
return ret; return ret;
/* TODO This needs to happen in S3 resume, too. /* Write ASLS PCI register and prepare SWSCI register. */
* Maybe it should move to the finalize handler intel_gma_opregion_register((uintptr_t)opregion);
*/
igd = dev_find_slot(0, PCI_DEVFN(0x2, 0));
pci_write_config32(igd, ASLS, (u32)opregion);
/* Intel's Windows driver relies on this: */
reg16 = pci_read_config16(igd, SWSCI);
reg16 &= ~GSSCIE;
reg16 |= SMISCISEL;
pci_write_config16(igd, SWSCI, reg16);
return CB_SUCCESS; return CB_SUCCESS;
} }