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mb/google/nissa: Change EC wake interrupt to IRQ 

EC wake event doesn't work. Nissa has a separate EC wake pin. SCI only
is not handled by EC, so we need to set dual route to wake the system.

BUG=b:229142661
TEST=EC wake event work as expected.

Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: Ide1f4a2494bb0a64b11ab4c5135fc43d2a635f74
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64379
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
This commit is contained in:
Eric Lai 2022-05-16 15:06:41 +08:00 committed by Felix Held
parent 539fd2ac5a
commit bf7b05fcc3
1 changed files with 1 additions and 1 deletions
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2
src/mainboard/google/brya/variants/baseboard/nissa/gpio.c
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@ -242,7 +242,7 @@ static const struct pad_config gpio_table[] = {
/* F16 : NC */ /* F16 : NC */
PAD_NC_LOCK(GPP_F16, NONE, LOCK_CONFIG), PAD_NC_LOCK(GPP_F16, NONE, LOCK_CONFIG),
/* F17 : THC1_SPI2_RST# ==> EC_SOC_WAKE_ODL */ /* F17 : THC1_SPI2_RST# ==> EC_SOC_WAKE_ODL */
PAD_CFG_GPI_SCI_LOCK(GPP_F17, NONE, LEVEL, INVERT, LOCK_CONFIG), PAD_CFG_GPI_IRQ_WAKE_LOCK(GPP_F17, NONE, LEVEL, INVERT, LOCK_CONFIG),
/* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */ /* F18 : THC1_SPI2_INT# ==> EC_IN_RW_OD */
PAD_CFG_GPI_LOCK(GPP_F18, NONE, LOCK_CONFIG), PAD_CFG_GPI_LOCK(GPP_F18, NONE, LOCK_CONFIG),
/* F19 : Not available */ /* F19 : Not available */