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sec/intel/txt/ramstage.c: Do not init the heap on S3 resume 

It causes problems on Haswell: SINIT detects that the heap tables differ
in size, and then issues a Class Code 9, Major Error Code 1 TXT reset.

Change-Id: I26f3d291abc7b2263e0b115e94426ac6ec8e5c48
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46495
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Angel Pons 2020-10-16 01:12:00 +02:00
parent 8f7e2a3add
commit c037695c19
1 changed files with 3 additions and 1 deletions
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4
src/security/intel/txt/ramstage.c
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@ -407,7 +407,9 @@ static void lockdown_intel_txt(void *unused)
write64((void *)TXT_MSEG_SIZE, 0);
write64((void *)TXT_MSEG_BASE, 0);
txt_initialize_heap();
/* Only initialize the heap on regular boots */
if (!acpi_is_wakeup_s3())
txt_initialize_heap();
if (CONFIG(INTEL_TXT_LOGGING))
txt_dump_regions();