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falco: Remove RTD2132 chip and setup from devicetree 

This disables the spread spectrum clock and avoids errata.

Old-Change-Id: I04eb767f1587bb64a215a92b66cd05e099d29964
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/66673
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit a7bf0d818c431221f4d014e3a0130bec8db7406e)

falco: Remove RTD2132 driver from kconfig

Original-Change-Id: I89ad9fbfbc58878602ed85ada918524426b5bc77
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/66946
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
(cherry picked from commit 1d732eb5e4743546b8ed50c8c44965a687f61ab2)

Conflicts:
	src/mainboard/google/falco/Kconfig

Old-Change-Id: I317a0741779e272ad72b7272ef6f4a67abd66698
Reviewed-on: https://chromium-review.googlesource.com/167311
Tested-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Duncan Laurie <dlaurie@chromium.org>
(cherry picked from commit ffa6c89fbac04b4b6fceafd4ba97d39a285c4aa3)

Squashed two commits and corrected the subject line from 2312
to 2132.

Change-Id: If4f1e59999b70efe2de45522ba78051d9ed88dd7
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6527
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Duncan Laurie 2013-08-22 10:19:25 -07:00 committed by Isaac Christensen
parent 45f868d34f
commit c14e961f23
2 changed files with 1 additions and 29 deletions
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1
src/mainboard/google/falco/Kconfig
View File

@ -18,7 +18,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_CHROMEOS
select EXTERNAL_MRC_BLOB select EXTERNAL_MRC_BLOB
select MONOTONIC_TIMER_MSR select MONOTONIC_TIMER_MSR
select DRIVERS_I2C_RTD2132
config VBOOT_RAMSTAGE_INDEX config VBOOT_RAMSTAGE_INDEX
hex hex

29
src/mainboard/google/falco/devicetree.cb
View File

@ -114,34 +114,7 @@ chip northbridge/intel/haswell
end end
end # LPC bridge end # LPC bridge
device pci 1f.2 on end # SATA Controller device pci 1f.2 on end # SATA Controller
device pci 1f.3 on # SMBus device pci 1f.3 on end # SMBus
chip drivers/i2c/rtd2132
# Panel Power Timings (1 ms units)
# Note: the panel Tx timings are very
# different from the LVDS bridge
# Tx timing settings. Below is a mapping
# for RTD2132 -> Panel timings.
# T1 = T2
# T2 = T8 + T10 + T12
# T3 = T14
# T4 = T15
# T5 = T9 + T11 + T13
# T6 = T3
# T7 = T4
register "t1" = "20"
register "t2" = "16"
register "t3" = "1"
register "t4" = "1"
register "t5" = "16"
register "t6" = "20"
register "t7" = "500"
# LVDS Swap settings are normal.
register "lvds_swap" = "0"
# Enable Spread Sprectrum at 1.0%
register "sscg_percent" = "0x10"
device i2c 35 on end
end
end
device pci 1f.6 on end # Thermal device pci 1f.6 on end # Thermal
end end
end end