falco: Remove RTD2132 chip and setup from devicetree
This disables the spread spectrum clock and avoids errata. Old-Change-Id: I04eb767f1587bb64a215a92b66cd05e099d29964 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/66673 Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit a7bf0d818c431221f4d014e3a0130bec8db7406e) falco: Remove RTD2132 driver from kconfig Original-Change-Id: I89ad9fbfbc58878602ed85ada918524426b5bc77 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/66946 Reviewed-by: Aaron Durbin <adurbin@chromium.org> (cherry picked from commit 1d732eb5e4743546b8ed50c8c44965a687f61ab2) Conflicts: src/mainboard/google/falco/Kconfig Old-Change-Id: I317a0741779e272ad72b7272ef6f4a67abd66698 Reviewed-on: https://chromium-review.googlesource.com/167311 Tested-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Commit-Queue: Duncan Laurie <dlaurie@chromium.org> (cherry picked from commit ffa6c89fbac04b4b6fceafd4ba97d39a285c4aa3) Squashed two commits and corrected the subject line from 2312 to 2132. Change-Id: If4f1e59999b70efe2de45522ba78051d9ed88dd7 Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6527 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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@ -18,7 +18,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
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select MAINBOARD_HAS_CHROMEOS
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select EXTERNAL_MRC_BLOB
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select MONOTONIC_TIMER_MSR
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select DRIVERS_I2C_RTD2132
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config VBOOT_RAMSTAGE_INDEX
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hex
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@ -114,34 +114,7 @@ chip northbridge/intel/haswell
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end
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end # LPC bridge
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device pci 1f.2 on end # SATA Controller
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device pci 1f.3 on # SMBus
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chip drivers/i2c/rtd2132
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# Panel Power Timings (1 ms units)
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# Note: the panel Tx timings are very
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# different from the LVDS bridge
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# Tx timing settings. Below is a mapping
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# for RTD2132 -> Panel timings.
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# T1 = T2
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# T2 = T8 + T10 + T12
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# T3 = T14
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# T4 = T15
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# T5 = T9 + T11 + T13
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# T6 = T3
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# T7 = T4
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register "t1" = "20"
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register "t2" = "16"
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register "t3" = "1"
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register "t4" = "1"
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register "t5" = "16"
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register "t6" = "20"
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register "t7" = "500"
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# LVDS Swap settings are normal.
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register "lvds_swap" = "0"
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# Enable Spread Sprectrum at 1.0%
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register "sscg_percent" = "0x10"
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device i2c 35 on end
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end
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end
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device pci 1f.3 on end # SMBus
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device pci 1f.6 on end # Thermal
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end
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end
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