soc/intel: Replace bad uses of `find_resource`

The `find_resource` function will never return null (will die instead).
In cases where the existing code already accounts for null pointers, it
is better to use `probe_resource` instead, which returns a null pointer
instead of dying.

Change-Id: I2a57ea1c2f5b156afd0724829e5b1880246f351f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58907
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>

src/soc/intel/baytrail/gfx.c

@@ -279,7 +279,7 @@ static void set_backlight_pwm(struct device *dev, uint32_t bklt_reg, int req_hz)
 	int divider;
 	struct resource *res;
 
-	res = find_resource(dev, PCI_BASE_ADDRESS_0);
+	res = probe_resource(dev, PCI_BASE_ADDRESS_0);
 
 	if (res == NULL)
 		return;

src/soc/intel/baytrail/hda.c

@@ -64,7 +64,7 @@ static void hda_init(struct device *dev)
 
 	reg_script_run_on_dev(dev, init_ops);
 
-	res = find_resource(dev, PCI_BASE_ADDRESS_0);
+	res = probe_resource(dev, PCI_BASE_ADDRESS_0);
 	if (res == NULL)
 		return;
 

src/soc/intel/baytrail/lpe.c

@@ -34,7 +34,7 @@ static void assign_device_nvs(struct device *dev, u32 *field, unsigned int index
 {
 	struct resource *res;
 
-	res = find_resource(dev, index);
+	res = probe_resource(dev, index);
 	if (res)
 		*field = res->base;
 }
@@ -112,7 +112,7 @@ static void lpe_stash_firmware_info(struct device *dev)
 	struct resource *mmio;
 	const struct pattrs *pattrs = pattrs_get();
 
-	res = find_resource(dev, FIRMWARE_PCI_REG_BASE);
+	res = probe_resource(dev, FIRMWARE_PCI_REG_BASE);
 	if (res == NULL) {
 		printk(BIOS_DEBUG, "LPE Firmware memory not found.\n");
 		return;

src/soc/intel/baytrail/lpss.c

@@ -32,11 +32,11 @@ static void dev_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index
 	struct device_nvs *dev_nvs = acpi_get_device_nvs();
 
 	/* Save BAR0 and BAR1 to ACPI NVS */
-	bar = find_resource(dev, PCI_BASE_ADDRESS_0);
+	bar = probe_resource(dev, PCI_BASE_ADDRESS_0);
 	if (bar)
 		dev_nvs->lpss_bar0[nvs_index] = (u32)bar->base;
 
-	bar = find_resource(dev, PCI_BASE_ADDRESS_1);
+	bar = probe_resource(dev, PCI_BASE_ADDRESS_1);
 	if (bar)
 		dev_nvs->lpss_bar1[nvs_index] = (u32)bar->base;
 

src/soc/intel/baytrail/scc.c

@@ -83,11 +83,11 @@ void scc_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index)
 	struct device_nvs *dev_nvs = acpi_get_device_nvs();
 
 	/* Save BAR0 and BAR1 to ACPI NVS */
-	bar = find_resource(dev, PCI_BASE_ADDRESS_0);
+	bar = probe_resource(dev, PCI_BASE_ADDRESS_0);
 	if (bar)
 		dev_nvs->scc_bar0[nvs_index] = (u32)bar->base;
 
-	bar = find_resource(dev, PCI_BASE_ADDRESS_1);
+	bar = probe_resource(dev, PCI_BASE_ADDRESS_1);
 	if (bar)
 		dev_nvs->scc_bar1[nvs_index] = (u32)bar->base;
 

src/soc/intel/braswell/lpe.c

@@ -35,7 +35,7 @@ static void assign_device_nvs(struct device *dev, u32 *field,
 {
 	struct resource *res;
 
-	res = find_resource(dev, index);
+	res = probe_resource(dev, index);
 	if (res)
 		*field = res->base;
 }
@@ -109,7 +109,7 @@ static void lpe_stash_firmware_info(struct device *dev)
 	struct resource *res;
 	struct resource *mmio;
 
-	res = find_resource(dev, FIRMWARE_PCI_REG_BASE);
+	res = probe_resource(dev, FIRMWARE_PCI_REG_BASE);
 	if (res == NULL) {
 		printk(BIOS_DEBUG, "LPE Firmware memory not found.\n");
 		return;
@@ -162,7 +162,7 @@ static void lpe_set_resources(struct device *dev)
 {
 	struct resource *res;
 
-	res = find_resource(dev, PCI_BASE_ADDRESS_2);
+	res = probe_resource(dev, PCI_BASE_ADDRESS_2);
 	if (res != NULL)
 		res->flags |= IORESOURCE_STORED;
 

src/soc/intel/braswell/lpss.c

@@ -31,11 +31,11 @@ static void dev_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index
 	struct device_nvs *dev_nvs = acpi_get_device_nvs();
 
 	/* Save BAR0 and BAR1 to ACPI NVS */
-	bar = find_resource(dev, PCI_BASE_ADDRESS_0);
+	bar = probe_resource(dev, PCI_BASE_ADDRESS_0);
 	if (bar)
 		dev_nvs->lpss_bar0[nvs_index] = (u32)bar->base;
 
-	bar = find_resource(dev, PCI_BASE_ADDRESS_1);
+	bar = probe_resource(dev, PCI_BASE_ADDRESS_1);
 	if (bar)
 		dev_nvs->lpss_bar1[nvs_index] = (u32)bar->base;
 

src/soc/intel/braswell/scc.c

@@ -13,10 +13,10 @@ void scc_enable_acpi_mode(struct device *dev, int iosf_reg, int nvs_index)
 	struct device_nvs *dev_nvs = acpi_get_device_nvs();
 
 	/* Save BAR0 and BAR1 to ACPI NVS */
-	bar = find_resource(dev, PCI_BASE_ADDRESS_0);
+	bar = probe_resource(dev, PCI_BASE_ADDRESS_0);
 	if (bar)
 		dev_nvs->scc_bar0[nvs_index] = bar->base;
-	bar = find_resource(dev, PCI_BASE_ADDRESS_2);
+	bar = probe_resource(dev, PCI_BASE_ADDRESS_2);
 	if (bar)
 		dev_nvs->scc_bar1[nvs_index] = bar->base;
 

src/soc/intel/broadwell/gma.c

@@ -505,7 +505,7 @@ static void igd_init(struct device *dev)
 
 	intel_gma_init_igd_opregion();
 
-	gtt_res = find_resource(dev, PCI_BASE_ADDRESS_0);
+	gtt_res = probe_resource(dev, PCI_BASE_ADDRESS_0);
 	if (!gtt_res || !gtt_res->base)
 		return;
 

src/soc/intel/broadwell/minihd.c

@@ -52,7 +52,7 @@ static void minihd_init(struct device *dev)
 	int codec_mask, i;
 
 	/* Find base address */
-	res = find_resource(dev, PCI_BASE_ADDRESS_0);
+	res = probe_resource(dev, PCI_BASE_ADDRESS_0);
 	if (!res)
 		return;
 

src/soc/intel/broadwell/pch/adsp.c

@@ -25,10 +25,10 @@ static void adsp_init(struct device *dev)
 	pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
 
 	/* Find BAR0 and BAR1 */
-	bar0 = find_resource(dev, PCI_BASE_ADDRESS_0);
+	bar0 = probe_resource(dev, PCI_BASE_ADDRESS_0);
 	if (!bar0)
 		return;
-	bar1 = find_resource(dev, PCI_BASE_ADDRESS_1);
+	bar1 = probe_resource(dev, PCI_BASE_ADDRESS_1);
 	if (!bar1)
 		return;
 

src/soc/intel/broadwell/pch/hda.c

@@ -80,7 +80,7 @@ static void hda_init(struct device *dev)
 	u32 codec_mask;
 
 	/* Find base address */
-	res = find_resource(dev, PCI_BASE_ADDRESS_0);
+	res = probe_resource(dev, PCI_BASE_ADDRESS_0);
 	if (!res)
 		return;
 

src/soc/intel/broadwell/pch/me.c

@@ -709,7 +709,7 @@ static int intel_mei_setup(struct device *dev)
 	struct mei_csr host;
 
 	/* Find the MMIO base for the ME interface */
-	res = find_resource(dev, PCI_BASE_ADDRESS_0);
+	res = probe_resource(dev, PCI_BASE_ADDRESS_0);
 	if (!res || res->base == 0 || res->size == 0) {
 		printk(BIOS_DEBUG, "ME: MEI resource not present!\n");
 		return -1;

src/soc/intel/broadwell/pch/serialio.c

@@ -166,10 +166,10 @@ static void serialio_init(struct device *dev)
 	pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
 
 	/* Find BAR0 and BAR1 */
-	bar0 = find_resource(dev, PCI_BASE_ADDRESS_0);
+	bar0 = probe_resource(dev, PCI_BASE_ADDRESS_0);
 	if (!bar0)
 		return;
-	bar1 = find_resource(dev, PCI_BASE_ADDRESS_1);
+	bar1 = probe_resource(dev, PCI_BASE_ADDRESS_1);
 	if (!bar1)
 		return;
 

src/soc/intel/common/block/graphics/graphics.c

@@ -100,7 +100,7 @@ static uintptr_t graphics_get_bar(struct device *dev, unsigned long index)
 {
 	struct resource *gm_res;
 
-	gm_res = find_resource(dev, index);
+	gm_res = probe_resource(dev, index);
 	if (!gm_res)
 		return 0;
 

src/soc/intel/common/block/i2c/i2c.c

@@ -123,7 +123,7 @@ uintptr_t dw_i2c_base_address(unsigned int bus)
 		return (uintptr_t)NULL;
 
 	/* dev -> bar0 */
-	res = find_resource(dev, PCI_BASE_ADDRESS_0);
+	res = probe_resource(dev, PCI_BASE_ADDRESS_0);
 	if (res)
 		return res->base;
 

src/soc/intel/common/block/smbus/smbus.c

@@ -46,7 +46,7 @@ static void pch_smbus_init(struct device *dev)
 		~((1 << 8) | (1 << 10) | (1 << 12) | (1 << 14)), 0);
 
 	/* Set Receive Slave Address */
-	res = find_resource(dev, PCI_BASE_ADDRESS_4);
+	res = probe_resource(dev, PCI_BASE_ADDRESS_4);
 	if (res)
 		smbus_set_slave_addr(res->base, SMBUS_SLAVE_ADDR);
 }

src/soc/intel/common/block/thermal/thermal.c

@@ -55,7 +55,7 @@ void pch_thermal_configuration(void)
 		return;
 	}
 
-	res = find_resource(dev, PCI_BASE_ADDRESS_0);
+	res = probe_resource(dev, PCI_BASE_ADDRESS_0);
 	if (!res) {
 		printk(BIOS_ERR, "ERROR: PCH thermal device not found!\n");
 		return;

src/soc/intel/common/block/xhci/xhci.c

@@ -33,7 +33,7 @@ static bool is_usb_port_connected(const struct xhci_usb_info *info,
 		return false;
 
 	/* Calculate port status register address and read the status */
-	res = find_resource(PCH_DEV_XHCI, PCI_BASE_ADDRESS_0);
+	res = probe_resource(PCH_DEV_XHCI, PCI_BASE_ADDRESS_0);
 	/* If the memory BAR is not allocated for XHCI, leave the devices enabled */
 	if (!res)
 		return true;

src/soc/intel/denverton_ns/uart.c

@@ -22,13 +22,13 @@ static void dnv_ns_uart_read_resources(struct device *dev)
 	pci_dev_read_resources(dev);
 	if (!CONFIG(LEGACY_UART_MODE))
 		return;
-	struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0);
+	struct resource *res = probe_resource(dev, PCI_BASE_ADDRESS_0);
 	if (res == NULL)
 		return;
 	res->size = 0x8;
 	res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
 	/* Do not configure membar */
-	res = find_resource(dev, PCI_BASE_ADDRESS_1);
+	res = probe_resource(dev, PCI_BASE_ADDRESS_1);
 	if (res != NULL)
 		res->flags = 0;
 	compact_resources(dev);

src/soc/intel/jasperlake/xhci.c

@@ -31,7 +31,7 @@ const struct xhci_usb_info *soc_get_xhci_usb_info(pci_devfn_t xhci_dev)
 static void set_xhci_lfps_sampling_offtime(struct device *dev, uint8_t time_ms)
 {
 	void *addr;
-	const struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0);
+	const struct resource *res = probe_resource(dev, PCI_BASE_ADDRESS_0);
 
 	if (!res)
 		return;

src/soc/intel/skylake/graphics.c

@@ -24,7 +24,7 @@ void graphics_soc_panel_init(struct device *dev)
 
 	panel_cfg = &conf->panel_cfg;
 
-	mmio_res = find_resource(dev, PCI_BASE_ADDRESS_0);
+	mmio_res = probe_resource(dev, PCI_BASE_ADDRESS_0);
 	if (!mmio_res || !mmio_res->base)
 		return;
 	base = (void *)(uintptr_t)mmio_res->base;