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mb/google/mancomb: PCIe GPIOs - enable enables, disable resets 

To train PCIe devices, the devices need to be enabled and taken out of
reset.  This patch does the bare minimum needed to train PCIe.  It is
not intended to handle timings, which will be addressed later.

Copy the enables for WLAN into early GPIO Init so that they're
enabled before FSP-M runs and trains the PCIe busses.

Again, this patch is the minimum to let the FSP train the PCIe busses.

BUG=b:182202136
TEST=Boot guybrush from NVME.

Signed-off-by: Ivy Jian <ivy_jian@compal.corp-partner.google.com>
Change-Id: I5e3e9fe21f44b832e26b0942759ae2ec96ec6c82
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52621
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
This commit is contained in:
Ivy Jian 2021-04-23 11:26:47 +08:00 committed by Patrick Georgi
parent 4f4eba9149
commit c20f33960c
1 changed files with 9 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
src/mainboard/google/mancomb/variants/baseboard/gpio.c
View File

@ -20,7 +20,7 @@ static const struct soc_amd_gpio base_gpio_table[] = {
/* AGPIO5 */ /* AGPIO5 */
PAD_NC(GPIO_5), PAD_NC(GPIO_5),
/* EN_PP3300_WLAN */ /* EN_PP3300_WLAN */
PAD_GPO(GPIO_6, LOW), PAD_GPO(GPIO_6, HIGH),
/* AGPIO7 */ /* AGPIO7 */
PAD_NC(GPIO_7), PAD_NC(GPIO_7),
/* EN_PP3300_LAN */ /* EN_PP3300_LAN */
@ -59,7 +59,7 @@ static const struct soc_amd_gpio base_gpio_table[] = {
PAD_NF(GPIO_27, PCIE_RST1_L, PULL_NONE), PAD_NF(GPIO_27, PCIE_RST1_L, PULL_NONE),
/* GPIO_28: Not available */ /* GPIO_28: Not available */
/* WLAN_AUX_RESET */ /* WLAN_AUX_RESET */
PAD_GPO(GPIO_29, HIGH), PAD_GPO(GPIO_29, LOW),
/* ESPI_CS_L */ /* ESPI_CS_L */
PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE), PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE),
/* AGPIO31 */ /* AGPIO31 */
@ -68,7 +68,7 @@ static const struct soc_amd_gpio base_gpio_table[] = {
PAD_NC(GPIO_32), PAD_NC(GPIO_32),
/* GPIO_33 - GPIO_39: Not available */ /* GPIO_33 - GPIO_39: Not available */
/* SSD_AUX_RESET_L */ /* SSD_AUX_RESET_L */
PAD_GPO(GPIO_40, LOW), PAD_GPO(GPIO_40, HIGH),
/* GPIO_41: Not available */ /* GPIO_41: Not available */
/* EGPIO42 */ /* EGPIO42 */
PAD_NC(GPIO_42), PAD_NC(GPIO_42),
@ -80,7 +80,7 @@ static const struct soc_amd_gpio base_gpio_table[] = {
/* AGPIO69 */ /* AGPIO69 */
PAD_NC(GPIO_69), PAD_NC(GPIO_69),
/* SD_AUX_RESET_L */ /* SD_AUX_RESET_L */
PAD_GPO(GPIO_70, LOW), PAD_GPO(GPIO_70, HIGH),
/* GPIO_71 - GPIO_73: Not available */ /* GPIO_71 - GPIO_73: Not available */
/* EGPIO74 */ /* EGPIO74 */
PAD_NC(GPIO_74), PAD_NC(GPIO_74),
@ -138,7 +138,7 @@ static const struct soc_amd_gpio base_gpio_table[] = {
/* AGPIO129 */ /* AGPIO129 */
PAD_NC(GPIO_129), PAD_NC(GPIO_129),
/* WLAN_DISABLE */ /* WLAN_DISABLE */
PAD_GPO(GPIO_130, HIGH), PAD_GPO(GPIO_130, LOW),
/* CLK_REQ3_L */ /* CLK_REQ3_L */
PAD_NF(GPIO_131, CLK_REQ3_L, PULL_NONE), PAD_NF(GPIO_131, CLK_REQ3_L, PULL_NONE),
/* BT_DISABLE */ /* BT_DISABLE */
@ -165,6 +165,10 @@ static const struct soc_amd_gpio base_gpio_table[] = {
/* Early GPIO configuration */ /* Early GPIO configuration */
static const struct soc_amd_gpio early_gpio_table[] = { static const struct soc_amd_gpio early_gpio_table[] = {
/* EN_PP3300_WLAN */
PAD_GPO(GPIO_6, HIGH),
/* WLAN_DISABLE */
PAD_GPO(GPIO_130, LOW),
/* GSC_SOC_INT_L */ /* GSC_SOC_INT_L */
PAD_INT(GPIO_3, PULL_NONE, EDGE_LOW, STATUS_DELIVERY), PAD_INT(GPIO_3, PULL_NONE, EDGE_LOW, STATUS_DELIVERY),
/* I2C3_SCL */ /* I2C3_SCL */