GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/volteer: Enable pcie rp11 for optane 

Optane memory module shows up as 2 NVMe devices in x2 config - NVMe
storage device and NVMe Optane memory. Storage device uses rp9 and
optane memory uses rp11. This patch enables rp11. Please note that
these two share clk related pins.

Configuring pciecontroller3 to be set from 2x2.  This will by done by
auto detecting optane memory: enabling HybridStorageMode.


BUG=b:148604250
BRANCH=chromeos
TEST='Build, boot and look for two NVMe devices with lspci on Volteer'

Cq-Depend: chrome-internal:2501837
Signed-off-by: Venkata Krishna Nimmagadda <venkata.krishna.nimmagadda@intel.com>
Change-Id: I5430829b496ed275e2e3bda3c0bf21c3d2132628
Reviewed-on: https://chrome-internal-review.googlesource.com/c/chromeos/third_party/coreboot-intel-private/jsl-tgl/+/2424428
Tested-by: Wonkyu Kim <wonkyu.kim@intel.corp-partner.google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39420
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Venkata Krishna Nimmagadda 2020-01-15 10:13:26 -08:00 committed by Patrick Georgi
parent 35d7843799
commit c34bb3807c
1 changed files with 5 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
src/mainboard/google/volteer/variants/baseboard/devicetree.cb
View File

@ -46,6 +46,10 @@ chip soc/intel/tigerlake
register "PcieClkSrcUsage[0]" = "8"
register "PcieClkSrcClkReq[0]" = "0"
# Enable Optane PCIE 11 using clk 0
register "PcieRpEnable[10]" = "1"
register "HybridStorageMode" = "1"
# Enable SD Card PCIE 8 using clk 3
register "PcieRpEnable[7]" = "1"
register "PcieClkSrcUsage[3]" = "7"
@ -311,7 +315,7 @@ chip soc/intel/tigerlake
device pci 1d.0 on end # RP9 0xA0B0
device pci 1d.1 off end # RP10 0xA0B1
device pci 1d.2 off end # RP11 0xA0B2
device pci 1d.2 on end # RP11 0xA0B2
device pci 1d.3 off end # RP12 0xA0B3
device pci 1d.4 off end # RP13 0xA0B4
device pci 1d.5 off end # RP14 0xA0B5