soc/intel/tigerlake: Use devfn_disable() function for XDCI

Use devfn_disable() for disabling a PCI device rather than
using `dev->enabled = 0`.

Also, use is_devfn_enabled() to get the device current state prior
updating the FSP-S UPD for XDCI.

TEST=FSP-S disabled XDCI when `xdci_can_enable` returns 0 and XDCI
is disabled at PCI enumeration `PCI: 00:14.1: enabled 0`.

Change-Id: I0e400ded7ba268a5f289b0ac568598e0dad1899a
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55722
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2021-06-21 19:07:48 +05:30
parent 1a5d4120e6
commit c3a5c0558d
1 changed files with 3 additions and 8 deletions

View File

@ -258,14 +258,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
} }
/* Enable xDCI controller if enabled in devicetree and allowed */ /* Enable xDCI controller if enabled in devicetree and allowed */
dev = pcidev_path_on_root(PCH_DEVFN_USBOTG);
if (dev) {
if (!xdci_can_enable()) if (!xdci_can_enable())
dev->enabled = 0; devfn_disable(pci_root_bus(), PCH_DEVFN_USBOTG);
params->XdciEnable = dev->enabled; params->XdciEnable = is_devfn_enabled(PCH_DEVFN_USBOTG);
} else {
params->XdciEnable = 0;
}
/* PCH UART selection for FSP Debug */ /* PCH UART selection for FSP Debug */
params->SerialIoDebugUartNumber = CONFIG_UART_FOR_CONSOLE; params->SerialIoDebugUartNumber = CONFIG_UART_FOR_CONSOLE;