AMD HyperTransport: Drop unused link optimisation
Change-Id: Ia4398f6eb013c69838487bdd02d094f97d7224b6 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8342 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -31,15 +31,11 @@
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#include <device/pci_ids.h>
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#include <device/hypertransport.h>
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/*
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* The hypertransport link is already optimized in pre-RAM code so don't do
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* it again.
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*/
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#define OPT_HT_LINK 0
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#if OPT_HT_LINK == 1
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#include <cpu/amd/model_fxx_rev.h>
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#endif
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struct ht_link {
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struct device *dev;
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unsigned pos;
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unsigned char ctrl_off, config_off, freq_off, freq_cap_off;
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};
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static device_t ht_scan_get_devs(device_t *old_devices)
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{
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@ -80,70 +76,13 @@ static device_t ht_scan_get_devs(device_t *old_devices)
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return first;
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}
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#if OPT_HT_LINK == 1
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static unsigned ht_read_freq_cap(device_t dev, unsigned pos)
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{
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/* Handle bugs in valid hypertransport frequency reporting. */
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unsigned freq_cap;
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freq_cap = pci_read_config16(dev, pos);
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freq_cap &= ~(1 << HT_FREQ_VENDOR); /* Ignore Vendor HT frequencies. */
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/* AMD 8131 Errata 48. */
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if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
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(dev->device == PCI_DEVICE_ID_AMD_8131_PCIX)) {
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freq_cap &= ~(1 << HT_FREQ_800Mhz);
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}
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/* AMD 8151 Errata 23. */
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if ((dev->vendor == PCI_VENDOR_ID_AMD) &&
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(dev->device == PCI_DEVICE_ID_AMD_8151_SYSCTRL)) {
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freq_cap &= ~(1 << HT_FREQ_800Mhz);
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}
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/* AMD K8 unsupported 1GHz? */
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if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
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#if CONFIG_K8_HT_FREQ_1G_SUPPORT
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#if !CONFIG_K8_REV_F_SUPPORT
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/* Only e0 later support 1GHz HT. */
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if (is_cpu_pre_e0())
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freq_cap &= ~(1 << HT_FREQ_1000Mhz);
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#endif
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#else
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freq_cap &= ~(1 << HT_FREQ_1000Mhz);
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#endif
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}
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return freq_cap;
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}
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#endif
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struct ht_link {
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struct device *dev;
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unsigned pos;
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unsigned char ctrl_off, config_off, freq_off, freq_cap_off;
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};
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static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
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{
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#if OPT_HT_LINK == 1
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static const u8 link_width_to_pow2[] = { 3, 4, 0, 5, 1, 2, 0, 0 };
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static const u8 pow2_to_link_width[] = { 7, 4, 5, 0, 1, 3 };
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unsigned present_width_cap, upstream_width_cap;
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unsigned present_freq_cap, upstream_freq_cap;
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unsigned ln_present_width_in, ln_upstream_width_in;
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unsigned ln_present_width_out, ln_upstream_width_out;
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unsigned freq, old_freq;
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unsigned present_width, upstream_width, old_width;
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#endif
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struct ht_link cur[1];
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int reset_needed;
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int linkb_to_host;
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/* Set the hypertransport link width and frequency. */
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reset_needed = 0;
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/*
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* See which side of the device our previous write to set the unitid
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* came from.
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@ -165,106 +104,6 @@ static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
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cur->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP1;
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}
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#if OPT_HT_LINK == 1
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/* Read the capabilities. */
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present_freq_cap =
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ht_read_freq_cap(cur->dev, cur->pos + cur->freq_cap_off);
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upstream_freq_cap =
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ht_read_freq_cap(prev->dev, prev->pos + prev->freq_cap_off);
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present_width_cap =
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pci_read_config8(cur->dev, cur->pos + cur->config_off);
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upstream_width_cap =
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pci_read_config8(prev->dev, prev->pos + prev->config_off);
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/* Calculate the highest usable frequency. */
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freq = log2(present_freq_cap & upstream_freq_cap);
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/* Calculate the highest width. */
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ln_upstream_width_in = link_width_to_pow2[upstream_width_cap & 7];
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ln_present_width_out = link_width_to_pow2[(present_width_cap >> 4) & 7];
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if (ln_upstream_width_in > ln_present_width_out)
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ln_upstream_width_in = ln_present_width_out;
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upstream_width = pow2_to_link_width[ln_upstream_width_in];
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present_width = pow2_to_link_width[ln_upstream_width_in] << 4;
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ln_upstream_width_out =
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link_width_to_pow2[(upstream_width_cap >> 4) & 7];
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ln_present_width_in = link_width_to_pow2[present_width_cap & 7];
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if (ln_upstream_width_out > ln_present_width_in)
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ln_upstream_width_out = ln_present_width_in;
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upstream_width |= pow2_to_link_width[ln_upstream_width_out] << 4;
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present_width |= pow2_to_link_width[ln_upstream_width_out];
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/* Set the current device. */
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old_freq = pci_read_config8(cur->dev, cur->pos + cur->freq_off);
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old_freq &= 0x0f;
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if (freq != old_freq) {
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unsigned new_freq;
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pci_write_config8(cur->dev, cur->pos + cur->freq_off, freq);
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reset_needed = 1;
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printk(BIOS_SPEW, "HyperT FreqP old %x new %x\n",old_freq,freq);
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new_freq = pci_read_config8(cur->dev, cur->pos + cur->freq_off);
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new_freq &= 0x0f;
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if (new_freq != freq) {
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printk(BIOS_ERR, "%s Hypertransport frequency would "
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"not set. Wanted: %x, got: %x\n",
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dev_path(dev), freq, new_freq);
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}
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}
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old_width = pci_read_config8(cur->dev, cur->pos + cur->config_off + 1);
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if (present_width != old_width) {
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unsigned new_width;
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pci_write_config8(cur->dev, cur->pos + cur->config_off + 1,
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present_width);
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reset_needed = 1;
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printk(BIOS_SPEW, "HyperT widthP old %x new %x\n",
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old_width, present_width);
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new_width = pci_read_config8(cur->dev,
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cur->pos + cur->config_off + 1);
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if (new_width != present_width) {
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printk(BIOS_ERR, "%s Hypertransport width would not "
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"set. Wanted: %x, got: %x\n",
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dev_path(dev), present_width, new_width);
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}
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}
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/* Set the upstream device. */
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old_freq = pci_read_config8(prev->dev, prev->pos + prev->freq_off);
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old_freq &= 0x0f;
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if (freq != old_freq) {
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unsigned new_freq;
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pci_write_config8(prev->dev, prev->pos + prev->freq_off, freq);
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reset_needed = 1;
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printk(BIOS_SPEW, "HyperT freqU old %x new %x\n",
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old_freq, freq);
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new_freq =
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pci_read_config8(prev->dev, prev->pos + prev->freq_off);
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new_freq &= 0x0f;
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if (new_freq != freq) {
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printk(BIOS_ERR, "%s Hypertransport frequency would "
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"not set. Wanted: %x, got: %x\n",
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dev_path(prev->dev), freq, new_freq);
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}
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}
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old_width =
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pci_read_config8(prev->dev, prev->pos + prev->config_off + 1);
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if (upstream_width != old_width) {
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unsigned new_width;
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pci_write_config8(prev->dev, prev->pos + prev->config_off + 1,
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upstream_width);
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reset_needed = 1;
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printk(BIOS_SPEW, "HyperT widthU old %x new %x\n", old_width,
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upstream_width);
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new_width = pci_read_config8(prev->dev,
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prev->pos + prev->config_off + 1);
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if (new_width != upstream_width) {
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printk(BIOS_ERR, "%s Hypertransport width would not "
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"set. Wanted: %x, got: %x\n",
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dev_path(prev->dev), upstream_width, new_width);
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}
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}
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#endif
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/*
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* Remember the current link as the previous link, but look at the
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* other offsets.
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@ -283,7 +122,7 @@ static int ht_setup_link(struct ht_link *prev, device_t dev, unsigned pos)
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prev->freq_cap_off = PCI_HT_CAP_SLAVE_FREQ_CAP0;
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}
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return reset_needed;
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return 0;
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}
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static unsigned ht_lookup_slave_capability(struct device *dev)
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end_of_chain:
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#if OPT_HT_LINK == 1
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if (bus->reset_needed)
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printk(BIOS_INFO, "HyperT reset needed\n");
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else
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printk(BIOS_DEBUG, "HyperT reset not needed\n");
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#endif
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#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
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if (offset_unitid && (ht_dev_num > 1)
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&& (real_last_unitid != CONFIG_HT_CHAIN_END_UNITID_BASE)
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