soc/intel/apollolake: Add PCIe de-emphasis enable configuration.
PCIe de-emphasis is enabled by default. Thunderpeak Wi-Fi requires it to be disabled. Therefore allow it to be configured via a device tree setting. TEST=On GLKRVP, verify Thunderpeak Wi-Fi card shows up in lspci when de-emphasis is disabled in device tree. Change-Id: Iae204768dfe00a638c764644c44c7cda269e73e0 Signed-off-by: Shamile Khan <shamile.khan@intel.com> Reviewed-on: https://review.coreboot.org/25185 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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2 changed files with 14 additions and 0 deletions
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@ -502,6 +502,17 @@ static void glk_fsp_silicon_init_params_cb(
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struct soc_intel_apollolake_config *cfg, FSP_S_CONFIG *silconfig)
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struct soc_intel_apollolake_config *cfg, FSP_S_CONFIG *silconfig)
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{
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{
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silconfig->Gmm = 0;
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silconfig->Gmm = 0;
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/* On Geminilake, we need to override the default FSP PCIe de-emphasis
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* settings using the device tree settings. This is because PCIe
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* de-emphasis is enabled by default and Thunderpeak PCIe WiFi detection
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* requires de-emphasis disabled. If we make this change common to both
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* Apollolake and Geminilake, then we need to add mainboard device tree
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* de-emphasis settings of 1 to Apollolake systems.
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*/
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memcpy(silconfig->PcieRpSelectableDeemphasis,
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cfg->pcie_rp_deemphasis_enable,
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sizeof(silconfig->PcieRpSelectableDeemphasis));
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}
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}
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void __attribute__((weak)) mainboard_devtree_update(struct device *dev)
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void __attribute__((weak)) mainboard_devtree_update(struct device *dev)
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@ -49,6 +49,9 @@ struct soc_intel_apollolake_config {
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/* Enable/disable hot-plug for root ports (0 = disable, 1 = enable). */
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/* Enable/disable hot-plug for root ports (0 = disable, 1 = enable). */
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uint8_t pcie_rp_hotplug_enable[MAX_PCIE_PORTS];
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uint8_t pcie_rp_hotplug_enable[MAX_PCIE_PORTS];
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/* De-emphasis enable configuration for each PCIe root port */
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uint8_t pcie_rp_deemphasis_enable[MAX_PCIE_PORTS];
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/* [14:8] DDR mode Number of dealy elements.Each = 125pSec.
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/* [14:8] DDR mode Number of dealy elements.Each = 125pSec.
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* [6:0] SDR mode Number of dealy elements.Each = 125pSec.
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* [6:0] SDR mode Number of dealy elements.Each = 125pSec.
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*/
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*/
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