soc/intel/apollolake: Select PERIODIC_SMI_RATE_SELECTION_IN_GEN_PMCON_B

Certain chipsets/SoCs like Apollo Lake use GEN_PMCON_B for periodic SMI
rate selection unlike other chipsets which use GEN_PMCON_A. Select
PERIODIC_SMI_RATE_SELECTION_IN_GEN_PMCON_B to indicate the register
difference.

Based on Apollo Lake datasheet Vol. 3 Revision 005:
https://cdrdv2.intel.com/v1/dl/getContent/334819

Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: If182e1285ad6bd3f7c54760440010c50f57f7013
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72072
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Michał Żygowski 2023-01-18 13:37:28 +01:00
parent 0d28b978e5
commit c68456ee4b
1 changed files with 1 additions and 0 deletions

View File

@ -64,6 +64,7 @@ config CPU_SPECIFIC_OPTIONS
select PCIEXP_COMMON_CLOCK
select PCIEXP_CLK_PM
select PCIEXP_L1_SUB_STATE
select PERIODIC_SMI_RATE_SELECTION_IN_GEN_PMCON_B
select PLATFORM_USES_FSP2_0
select PMC_INVALID_READ_AFTER_WRITE
select PMC_GLOBAL_RESET_ENABLE_LOCK