mb/google/brya/var/kano: Disable PCH USB2 phy power gating
The patch disables PCH USB2 Phy power gating to prevent possible display flicker issue for kano board. Please refer Intel doc#723158 for more information. BUG=None TEST=Verify the build for kano board Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com> Change-Id: I19430a68e1e847e71382781563200a4c88f37a59 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65107 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ren Kuo <ren.kuo@quanta.corp-partner.google.com>
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@ -19,6 +19,10 @@ end
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chip soc/intel/alderlake
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chip soc/intel/alderlake
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register "sagv" = "SaGv_Enabled"
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register "sagv" = "SaGv_Enabled"
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# As per Intel Advisory doc#723158, the change is required to prevent possible
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# display flickering issue.
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register "usb2_phy_sus_pg_disable" = "1"
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# GPE configuration
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# GPE configuration
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register "pmc_gpe0_dw1" = "GPP_D"
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register "pmc_gpe0_dw1" = "GPP_D"
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