soc/intel/broadwell/pcie.c: Simplify AND-mask

There's no need to mask out bit 11, as it is unconditionally set. For
some reason, this changes the resulting coreboot image. Also simplify
another PCI operation with a redundant AND-mask.

Change-Id: I5492acd5f9c61db83a07ce7c1f6b887768c3eadf
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57499
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Angel Pons 2021-09-08 14:22:12 +02:00 committed by Felix Held
parent 7af90247be
commit c7ca0f2e33
1 changed files with 2 additions and 2 deletions

View File

@ -516,8 +516,8 @@ static void pch_pcie_early(struct device *dev)
}
/* Enable LTR in Root Port. Disable OBFF. */
pci_update_config32(dev, 0x64, ~(1 << 11) & ~(3 << 18), (1 << 11));
pci_update_config32(dev, 0x68, ~(1 << 10), (1 << 10));
pci_update_config32(dev, 0x64, ~(3 << 18), (1 << 11));
pci_or_config32(dev, 0x68, 1 << 10);
pci_update_config32(dev, 0x318, ~(0xffff << 16), (0x1414 << 16));