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mainboard/google/zoombini/variants/meowth: enable touchscreen 

BUG=b:69011806, b:72179988
BRANCH=master
TEST=Verify touchscreen on meowth works with this change.

Change-Id: Iad3f0b77a02552266435e523fdbb74b14ada101a
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/23551
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Lijian Zhao <lijian.zhao@intel.com>
This commit is contained in:
Nick Vaccaro 2018-02-01 13:36:49 -08:00 committed by Aaron Durbin
parent 7681481f65
commit c92f13533b
3 changed files with 20 additions and 3 deletions
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1
src/mainboard/google/zoombini/Kconfig
View File

@ -3,6 +3,7 @@ config BOARD_GOOGLE_BASEBOARD_ZOOMBINI
def_bool n def_bool n
select BOARD_ROMSIZE_KB_16384 select BOARD_ROMSIZE_KB_16384
select DRIVERS_I2C_GENERIC select DRIVERS_I2C_GENERIC
select DRIVERS_I2C_HID
select DRIVERS_SPI_ACPI select DRIVERS_SPI_ACPI
select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC
select EC_GOOGLE_CHROMEEC_LPC select EC_GOOGLE_CHROMEEC_LPC

18
src/mainboard/google/zoombini/variants/meowth/devicetree.cb
View File

@ -53,6 +53,13 @@ chip soc/intel/cannonlake
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)" register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC2)"
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)" register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)"
# Touchscreen Digitizer
register "i2c[0]" = "{
.speed = I2C_SPEED_FAST_PLUS,
.rise_time_ns = 98,
.fall_time_ns = 38,
}"
device domain 0 on device domain 0 on
device pci 00.0 on end # Host Bridge device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device device pci 02.0 on end # Integrated Graphics Device
@ -63,7 +70,16 @@ chip soc/intel/cannonlake
device pci 14.0 on end # USB xHCI device pci 14.0 on end # USB xHCI
device pci 14.1 off end # USB xDCI (OTG) device pci 14.1 off end # USB xDCI (OTG)
device pci 14.5 off end # SDCard device pci 14.5 off end # SDCard
device pci 15.0 on end # I2C #0 device pci 15.0 on
chip drivers/i2c/hid
register "generic.hid" = ""WCOM50C1""
register "generic.desc" = ""WCOM Digitizer""
register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C14_IRQ)"
register "generic.speed" = "I2C_SPEED_FAST_PLUS"
register "hid_desc_reg_offset" = "0x1"
device i2c 0a on end
end
end # I2C #0
device pci 15.1 on end # I2C #1 device pci 15.1 on end # I2C #1
device pci 15.2 on end # I2C #2 device pci 15.2 on end # I2C #2
device pci 15.3 on end # I2C #3 device pci 15.3 on end # I2C #3

4
src/mainboard/google/zoombini/variants/meowth/gpio.c
View File

@ -94,13 +94,13 @@ static const struct pad_config gpio_table[] = {
NF1), /* UART_PCH_RX_DEBUG_TX */ NF1), /* UART_PCH_RX_DEBUG_TX */
/* UART0_TXD */ PAD_CFG_NF(GPP_C9, NONE, DEEP, /* UART0_TXD */ PAD_CFG_NF(GPP_C9, NONE, DEEP,
NF1), /* UART_PCH_TX_DEBUG_RX */ NF1), /* UART_PCH_TX_DEBUG_RX */
/* UART0_RTS# */ PAD_CFG_GPO(GPP_C10, 0, DEEP), /* PP3300_TOUCH_EN */ /* UART0_RTS# */ PAD_CFG_GPO(GPP_C10, 1, DEEP), /* PP3300_TOUCH_EN */
/* UART0_CTS# */ PAD_NC(GPP_C11, NONE), /* UART0_CTS# */ PAD_NC(GPP_C11, NONE),
/* Only P0 boards need an internal pullup */ /* Only P0 boards need an internal pullup */
/* UART1_RXD */ PAD_CFG_GPI_APIC(GPP_C12, UP_20K, DEEP, EDGE_SINGLE, /* UART1_RXD */ PAD_CFG_GPI_APIC(GPP_C12, UP_20K, DEEP, EDGE_SINGLE,
INVERT), /* H1_PCH_INT_ODL */ INVERT), /* H1_PCH_INT_ODL */
/* UART1_TXD */ PAD_NC(GPP_C13, NONE), /* UART1_TXD */ PAD_NC(GPP_C13, NONE),
/* UART1_RTS# */ PAD_CFG_GPI_SCI(GPP_C14, NONE, DEEP, EDGE_SINGLE, /* UART1_RTS# */ PAD_CFG_GPI_APIC(GPP_C14, NONE, DEEP, LEVEL,
NONE), /* TOUCHSCREEN_INT_ODL */ NONE), /* TOUCHSCREEN_INT_ODL */
/* UART1_CTS# */ PAD_NC(GPP_C15, NONE), /* UART1_CTS# */ PAD_NC(GPP_C15, NONE),
/* I2C0_SDA */ PAD_CFG_NF(GPP_C16, NONE, DEEP, /* I2C0_SDA */ PAD_CFG_NF(GPP_C16, NONE, DEEP,