northbridge/via/cn700: transition away from device_t

Replace the use of the old device_t definition inside
northbridge/via/cn700.

Change-Id: Ib7761697daad3c459f3568e5158f925199bcd919
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/16689
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Antonello Dettori 2016-09-03 10:45:33 +02:00 committed by Martin Roth
parent 76e8c00be6
commit ca159f0fb3
2 changed files with 5 additions and 5 deletions

View File

@ -34,7 +34,7 @@
#define DUMPNORTH()
#endif
static void do_ram_command(device_t dev, u8 command)
static void do_ram_command(pci_devfn_t dev, u8 command)
{
u8 reg;
@ -58,7 +58,7 @@ static void do_ram_command(device_t dev, u8 command)
*
* @param dev The northbridge's CPU Host Interface (D0F2).
*/
static void c7_cpu_setup(device_t dev)
static void c7_cpu_setup(pci_devfn_t dev)
{
/* Host bus interface registers (D0F2 0x50-0x67) */
/* Request phase control */
@ -376,7 +376,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
static void sdram_set_post(const struct mem_controller *ctrl)
{
device_t dev = ctrl->d0f3;
pci_devfn_t dev = ctrl->d0f3;
/* Enable multipage mode. */
pci_write_config8(dev, 0x69, 0x03);
@ -389,7 +389,7 @@ static void sdram_set_post(const struct mem_controller *ctrl)
pci_write_config16(dev, 0xa4, 0x0010);
}
static void sdram_enable(device_t dev, u8 *rank_address)
static void sdram_enable(pci_devfn_t dev, u8 *rank_address)
{
u8 i;

View File

@ -20,7 +20,7 @@
#define DIMM_SOCKETS 1 /* Only one works, for now. */
struct mem_controller {
device_t d0f0, d0f2, d0f3, d0f4, d0f7, d1f0;
pci_devfn_t d0f0, d0f2, d0f3, d0f4, d0f7, d1f0;
u8 channel0[DIMM_SOCKETS];
};