northbridge/via/cn700: transition away from device_t
Replace the use of the old device_t definition inside northbridge/via/cn700. Change-Id: Ib7761697daad3c459f3568e5158f925199bcd919 Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/16689 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
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@ -34,7 +34,7 @@
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#define DUMPNORTH()
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#endif
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static void do_ram_command(device_t dev, u8 command)
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static void do_ram_command(pci_devfn_t dev, u8 command)
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{
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u8 reg;
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@ -58,7 +58,7 @@ static void do_ram_command(device_t dev, u8 command)
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*
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* @param dev The northbridge's CPU Host Interface (D0F2).
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*/
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static void c7_cpu_setup(device_t dev)
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static void c7_cpu_setup(pci_devfn_t dev)
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{
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/* Host bus interface registers (D0F2 0x50-0x67) */
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/* Request phase control */
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@ -376,7 +376,7 @@ static void sdram_set_registers(const struct mem_controller *ctrl)
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static void sdram_set_post(const struct mem_controller *ctrl)
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{
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device_t dev = ctrl->d0f3;
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pci_devfn_t dev = ctrl->d0f3;
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/* Enable multipage mode. */
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pci_write_config8(dev, 0x69, 0x03);
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@ -389,7 +389,7 @@ static void sdram_set_post(const struct mem_controller *ctrl)
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pci_write_config16(dev, 0xa4, 0x0010);
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}
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static void sdram_enable(device_t dev, u8 *rank_address)
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static void sdram_enable(pci_devfn_t dev, u8 *rank_address)
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{
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u8 i;
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@ -20,7 +20,7 @@
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#define DIMM_SOCKETS 1 /* Only one works, for now. */
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struct mem_controller {
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device_t d0f0, d0f2, d0f3, d0f4, d0f7, d1f0;
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pci_devfn_t d0f0, d0f2, d0f3, d0f4, d0f7, d1f0;
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u8 channel0[DIMM_SOCKETS];
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};
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