AMD fam10: Remove HAVE_ACPI_RESUME support
Change-Id: I62bbba8cfe515b3cae413582ff8d062a20e6741b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/15474 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -116,23 +116,6 @@ static int backup_create_or_update(struct resume_backup *backup_mem,
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return 0;
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return 0;
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}
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}
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void *acpi_backup_container(uintptr_t base, size_t size)
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{
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struct resume_backup *backup_mem = cbmem_find(CBMEM_ID_RESUME);
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if (!backup_mem)
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return NULL;
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if (!IS_ALIGNED(base, BACKUP_PAGE_SZ) || !IS_ALIGNED(size,
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BACKUP_PAGE_SZ))
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return NULL;
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if (backup_create_or_update(backup_mem, base, size) < 0)
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return NULL;
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backup_mem->valid = 1;
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return (void *)(uintptr_t)backup_mem->cbmem;
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}
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void backup_ramstage_section(uintptr_t base, size_t size)
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void backup_ramstage_section(uintptr_t base, size_t size)
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{
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{
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struct resume_backup *backup_mem = cbmem_find(CBMEM_ID_RESUME);
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struct resume_backup *backup_mem = cbmem_find(CBMEM_ID_RESUME);
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@ -976,13 +976,6 @@ static inline int acpi_s3_resume_allowed(void)
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return CONFIG(HAVE_ACPI_RESUME);
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return CONFIG(HAVE_ACPI_RESUME);
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}
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}
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/* Return address in reserved memory where to backup low memory
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* while platform resumes from S3 suspend. Caller is responsible of
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* making a complete copy of the region base..base+size, with
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* parameteres base and size that meet page alignment requirement.
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*/
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void *acpi_backup_container(uintptr_t base, size_t size);
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#if CONFIG(HAVE_ACPI_RESUME)
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#if CONFIG(HAVE_ACPI_RESUME)
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#ifdef __PRE_RAM__
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#ifdef __PRE_RAM__
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@ -27,6 +27,7 @@
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#include <cpu/amd/car.h>
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#include <cpu/amd/car.h>
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#include <cpu/amd/msr.h>
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#include <cpu/amd/msr.h>
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#include <arch/acpi.h>
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#include <arch/acpi.h>
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#include <program_loading.h>
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#include <romstage_handoff.h>
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#include <romstage_handoff.h>
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#include "cpu/amd/car/disable_cache_as_ram.c"
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#include "cpu/amd/car/disable_cache_as_ram.c"
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@ -44,12 +45,6 @@
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#define print_car_debug(format, arg...)
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#define print_car_debug(format, arg...)
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#endif
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#endif
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static size_t backup_size(void)
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{
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size_t car_size = car_data_size();
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return ALIGN_UP(car_size + 1024, 1024);
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}
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static void memcpy_(void *d, const void *s, size_t len)
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static void memcpy_(void *d, const void *s, size_t len)
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{
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{
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print_car_debug(" Copy [%08x-%08x] to [%08x - %08x] ...",
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print_car_debug(" Copy [%08x-%08x] to [%08x - %08x] ...",
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@ -58,13 +53,6 @@ static void memcpy_(void *d, const void *s, size_t len)
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memcpy(d, s, len);
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memcpy(d, s, len);
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}
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}
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static void memset_(void *d, int val, size_t len)
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{
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print_car_debug(" Fill [%08x-%08x] ...",
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(uint32_t) d, (uint32_t) (d + len - 1));
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memset(d, val, len);
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}
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static int memcmp_(void *d, const void *s, size_t len)
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static int memcmp_(void *d, const void *s, size_t len)
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{
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{
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print_car_debug(" Compare [%08x-%08x] with [%08x - %08x] ...",
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print_car_debug(" Compare [%08x-%08x] with [%08x - %08x] ...",
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@ -73,41 +61,6 @@ static int memcmp_(void *d, const void *s, size_t len)
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return memcmp(d, s, len);
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return memcmp(d, s, len);
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}
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}
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static void prepare_romstage_ramstack(int s3resume)
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{
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size_t backup_top = backup_size();
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print_car_debug("Prepare CAR migration and stack regions...");
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if (s3resume) {
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void *resume_backup_memory =
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acpi_backup_container(CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
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if (resume_backup_memory)
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memcpy_(resume_backup_memory
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+ HIGH_MEMORY_SAVE - backup_top,
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(void *)(CONFIG_RAMTOP - backup_top),
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backup_top);
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}
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memset_((void *)(CONFIG_RAMTOP - backup_top), 0, backup_top);
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print_car_debug(" Done\n");
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}
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static void prepare_ramstage_region(int s3resume)
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{
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size_t backup_top = backup_size();
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print_car_debug("Prepare ramstage memory region...");
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if (s3resume) {
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void *resume_backup_memory =
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acpi_backup_container(CONFIG_RAMBASE, HIGH_MEMORY_SAVE);
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if (resume_backup_memory)
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memcpy_(resume_backup_memory, (void *) CONFIG_RAMBASE,
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HIGH_MEMORY_SAVE - backup_top);
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}
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print_car_debug(" Done\n");
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}
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/* Disable Erratum 343 Workaround, see RevGuide for Fam10h, Pub#41322 Rev 3.33
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/* Disable Erratum 343 Workaround, see RevGuide for Fam10h, Pub#41322 Rev 3.33
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* and RevGuide for Fam12h, Pub#44739 Rev 3.10
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* and RevGuide for Fam12h, Pub#44739 Rev 3.10
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*/
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*/
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@ -137,9 +90,10 @@ asmlinkage void *post_cache_as_ram(void)
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if ((*lower_stack_boundary) != 0xdeadbeef)
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if ((*lower_stack_boundary) != 0xdeadbeef)
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printk(BIOS_WARNING, "BSP overran lower stack boundary. Undefined behaviour may result!\n");
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printk(BIOS_WARNING, "BSP overran lower stack boundary. Undefined behaviour may result!\n");
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s3resume = acpi_is_wakeup_s3();
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prepare_romstage_ramstack(s3resume);
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/* ACPI S3 is not supported without RELOCATABLE_RAMSTAGE and
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* this will always return 0. */
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s3resume = acpi_is_wakeup_s3();
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romstage_handoff_init(s3resume);
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romstage_handoff_init(s3resume);
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@ -177,8 +131,6 @@ asmlinkage void cache_as_ram_new_stack(void)
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set_var_mtrr(0, 0x00000000, CACHE_TMP_RAMTOP, MTRR_TYPE_WRBACK);
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set_var_mtrr(0, 0x00000000, CACHE_TMP_RAMTOP, MTRR_TYPE_WRBACK);
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enable_cache();
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enable_cache();
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prepare_ramstage_region(acpi_is_wakeup_s3());
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set_sysinfo_in_ram(1); // So other core0 could start to train mem
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set_sysinfo_in_ram(1); // So other core0 could start to train mem
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/*copy and execute ramstage */
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/*copy and execute ramstage */
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@ -10,7 +10,6 @@ config CPU_AMD_MODEL_10XXX
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select SUPPORT_CPU_UCODE_IN_CBFS
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select SUPPORT_CPU_UCODE_IN_CBFS
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select CPU_MICROCODE_MULTIPLE_FILES
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select CPU_MICROCODE_MULTIPLE_FILES
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select CAR_GLOBAL_MIGRATION
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select CAR_GLOBAL_MIGRATION
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select ACPI_HUGE_LOWMEM_BACKUP
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if CPU_AMD_MODEL_10XXX
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if CPU_AMD_MODEL_10XXX
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@ -27,7 +27,6 @@ config BOARD_SPECIFIC_OPTIONS
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select BOARD_ROMSIZE_KB_2048
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select BOARD_ROMSIZE_KB_2048
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select ENABLE_APIC_EXT_ID
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select ENABLE_APIC_EXT_ID
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select SPI_FLASH
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select SPI_FLASH
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select HAVE_ACPI_RESUME
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select DRIVERS_I2C_W83795
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select DRIVERS_I2C_W83795
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select DRIVERS_ASPEED_AST2050
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select DRIVERS_ASPEED_AST2050
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select MAINBOARD_FORCE_NATIVE_VGA_INIT
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select MAINBOARD_FORCE_NATIVE_VGA_INIT
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@ -28,7 +28,6 @@ config BOARD_SPECIFIC_OPTIONS
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select ENABLE_APIC_EXT_ID
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select ENABLE_APIC_EXT_ID
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select SPI_FLASH
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select SPI_FLASH
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select MAINBOARD_HAS_LPC_TPM
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select MAINBOARD_HAS_LPC_TPM
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select HAVE_ACPI_RESUME
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select DRIVERS_I2C_W83795
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select DRIVERS_I2C_W83795
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select DRIVERS_ASPEED_AST2050
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select DRIVERS_ASPEED_AST2050
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select MAINBOARD_FORCE_NATIVE_VGA_INIT
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select MAINBOARD_FORCE_NATIVE_VGA_INIT
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