cpu/intel/model_206ax: Remove fake lapic device
Instead of using a fake lapic device hook up the cpu cluster to chip cpu/intel/model_206ax. The lapic device is also not needed as the mp init will allocate it for the BSP at runtime. Change-Id: Id3b1c4ca027e2905535e137691c3e3e60417dbf3 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/59316 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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d52bfbb6aa
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cdb26fd011
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@ -95,18 +95,9 @@ static int get_logical_cores_per_package(void)
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return msr.lo & 0xffff;
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return msr.lo & 0xffff;
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}
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}
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static void generate_C_state_entries(void)
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static void generate_C_state_entries(const struct device *dev)
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{
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{
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struct device *lapic;
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struct cpu_intel_model_206ax_config *conf = dev->bus->dev->chip_info;
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struct cpu_intel_model_206ax_config *conf = NULL;
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/* Find the SpeedStep CPU in the device tree using magic APIC ID */
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lapic = dev_find_lapic(SPEEDSTEP_APIC_MAGIC);
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if (!lapic)
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return;
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conf = lapic->chip_info;
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if (!conf)
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return;
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const int acpi_cstates[3] = { conf->acpi_c1, conf->acpi_c2, conf->acpi_c3 };
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const int acpi_cstates[3] = { conf->acpi_c1, conf->acpi_c2, conf->acpi_c3 };
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@ -324,7 +315,7 @@ void generate_cpu_entries(const struct device *device)
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cpuID-1, cores_per_package);
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cpuID-1, cores_per_package);
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/* Generate C-state tables */
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/* Generate C-state tables */
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generate_C_state_entries();
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generate_C_state_entries(device);
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/* Generate T-state tables */
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/* Generate T-state tables */
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generate_T_state_entries(
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generate_T_state_entries(
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@ -1,8 +1,5 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* Magic value used to locate this chip in the device tree */
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#define SPEEDSTEP_APIC_MAGIC 0xACAC
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/* Keep this in sync with acpi.c */
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/* Keep this in sync with acpi.c */
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enum cpu_acpi_level {
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enum cpu_acpi_level {
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CPU_ACPI_DISABLED = 0,
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CPU_ACPI_DISABLED = 0,
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@ -211,18 +211,11 @@ static void configure_c_states(void)
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wrmsr(MSR_PP1_CURRENT_CONFIG, msr);
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wrmsr(MSR_PP1_CURRENT_CONFIG, msr);
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}
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}
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static void configure_thermal_target(void)
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static void configure_thermal_target(struct device *dev)
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{
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{
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struct cpu_intel_model_206ax_config *conf;
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struct cpu_intel_model_206ax_config *conf = dev->bus->dev->chip_info;
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struct device *lapic;
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msr_t msr;
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msr_t msr;
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/* Find pointer to CPU configuration */
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lapic = dev_find_lapic(SPEEDSTEP_APIC_MAGIC);
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if (!lapic || !lapic->chip_info)
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return;
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conf = lapic->chip_info;
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/* Set TCC activation offset if supported */
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/* Set TCC activation offset if supported */
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msr = rdmsr(MSR_PLATFORM_INFO);
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msr = rdmsr(MSR_PLATFORM_INFO);
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if ((msr.lo & (1 << 30)) && conf->tcc_offset) {
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if ((msr.lo & (1 << 30)) && conf->tcc_offset) {
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@ -346,7 +339,7 @@ static void model_206ax_init(struct device *cpu)
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configure_misc();
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configure_misc();
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/* Thermal throttle activation offset */
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/* Thermal throttle activation offset */
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configure_thermal_target();
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configure_thermal_target(cpu);
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set_aesni_lock();
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set_aesni_lock();
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@ -1,10 +1,8 @@
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chip northbridge/intel/sandybridge
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chip northbridge/intel/sandybridge
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device cpu_cluster 0 on
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chip cpu/intel/model_206ax
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chip cpu/intel/model_206ax
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device cpu_cluster 0 on end
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register "tcc_offset" = "5" # TCC of 95C
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register "tcc_offset" = "5" # TCC of 95C
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device lapic 0 on end
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device lapic 0xacac off end
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end
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end
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end
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device domain 0 on
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device domain 0 on
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@ -19,15 +19,11 @@ chip northbridge/intel/sandybridge
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register "max_mem_clock_mhz" = "666"
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register "max_mem_clock_mhz" = "666"
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device cpu_cluster 0 on
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chip cpu/intel/model_206ax
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chip cpu/intel/model_206ax
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# Magic APIC ID to locate this chip
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device cpu_cluster 0 on end
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device lapic 0 on end
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device lapic 0xacac off end
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register "tcc_offset" = "5" # TCC of 95C
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register "tcc_offset" = "5" # TCC of 95C
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end
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end
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end
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device domain 0 on
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device domain 0 on
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subsystemid 0x1ae0 0xc000 inherit
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subsystemid 0x1ae0 0xc000 inherit
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@ -11,16 +11,13 @@ chip northbridge/intel/sandybridge
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# Enable DVI Hotplug with 6ms pulse
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# Enable DVI Hotplug with 6ms pulse
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register "gpu_dp_b_hotplug" = "0x06"
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register "gpu_dp_b_hotplug" = "0x06"
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device cpu_cluster 0 on
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chip cpu/intel/model_206ax
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chip cpu/intel/model_206ax
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# Magic APIC ID to locate this chip
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device cpu_cluster 0 on end
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device lapic 0 on end
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device lapic 0xacac off end
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register "acpi_c1" = "CPU_ACPI_C3"
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register "acpi_c1" = "CPU_ACPI_C3"
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register "acpi_c2" = "CPU_ACPI_C6"
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register "acpi_c2" = "CPU_ACPI_C6"
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end
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end
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end
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device domain 0 on
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device domain 0 on
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device pci 00.0 on end # host bridge
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device pci 00.0 on end # host bridge
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@ -2,16 +2,12 @@ chip northbridge/intel/sandybridge
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# IGD Displays
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# IGD Displays
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register "gfx" = "GMA_STATIC_DISPLAYS(0)"
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register "gfx" = "GMA_STATIC_DISPLAYS(0)"
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device cpu_cluster 0 on
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chip cpu/intel/model_206ax
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chip cpu/intel/model_206ax
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# Magic APIC ID to locate this chip
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device cpu_cluster 0 on end
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device lapic 0 on end
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device lapic 0xacac off end
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register "acpi_c2" = "CPU_ACPI_C6"
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register "acpi_c2" = "CPU_ACPI_C6"
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register "acpi_c3" = "CPU_ACPI_DISABLED"
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register "acpi_c3" = "CPU_ACPI_DISABLED"
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end
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end
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end
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device domain 0 on
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device domain 0 on
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device pci 00.0 on end # host bridge
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device pci 00.0 on end # host bridge
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@ -17,16 +17,12 @@ chip northbridge/intel/sandybridge
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register "gpu_cpu_backlight" = "0x0000001a"
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register "gpu_cpu_backlight" = "0x0000001a"
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register "gpu_pch_backlight" = "0x002e0000"
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register "gpu_pch_backlight" = "0x002e0000"
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device cpu_cluster 0 on
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chip cpu/intel/model_206ax
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chip cpu/intel/model_206ax
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# Magic APIC ID to locate this chip
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device cpu_cluster 0 on end
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device lapic 0 on end
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device lapic 0xacac off end
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register "acpi_c2" = "CPU_ACPI_C6"
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register "acpi_c2" = "CPU_ACPI_C6"
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register "acpi_c3" = "CPU_ACPI_DISABLED"
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register "acpi_c3" = "CPU_ACPI_DISABLED"
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end
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end
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end
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device domain 0 on
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device domain 0 on
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device pci 00.0 on end # host bridge
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device pci 00.0 on end # host bridge
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@ -17,16 +17,12 @@ chip northbridge/intel/sandybridge
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register "gpu_cpu_backlight" = "0x00000ac8"
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register "gpu_cpu_backlight" = "0x00000ac8"
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register "gpu_pch_backlight" = "0x13120000"
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register "gpu_pch_backlight" = "0x13120000"
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device cpu_cluster 0 on
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chip cpu/intel/model_206ax
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chip cpu/intel/model_206ax
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# Magic APIC ID to locate this chip
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device cpu_cluster 0 on end
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device lapic 0 on end
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device lapic 0xacac off end
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register "acpi_c2" = "CPU_ACPI_C6"
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register "acpi_c2" = "CPU_ACPI_C6"
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register "acpi_c3" = "CPU_ACPI_DISABLED"
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register "acpi_c3" = "CPU_ACPI_DISABLED"
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end
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end
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end
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device domain 0 on
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device domain 0 on
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device pci 00.0 on end # host bridge
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device pci 00.0 on end # host bridge
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@ -11,16 +11,12 @@ chip northbridge/intel/sandybridge
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register "max_mem_clock_mhz" = "666"
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register "max_mem_clock_mhz" = "666"
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device cpu_cluster 0 on
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chip cpu/intel/model_206ax
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chip cpu/intel/model_206ax
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# Magic APIC ID to locate this chip
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device cpu_cluster 0 on end
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device lapic 0 on end
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device lapic 0xacac off end
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register "acpi_c1" = "CPU_ACPI_C3"
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register "acpi_c1" = "CPU_ACPI_C3"
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register "acpi_c2" = "CPU_ACPI_C6"
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register "acpi_c2" = "CPU_ACPI_C6"
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end
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end
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end
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device domain 0 on
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device domain 0 on
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subsystemid 0x1ae0 0xc000 inherit
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subsystemid 0x1ae0 0xc000 inherit
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@ -1,19 +1,13 @@
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# SPDX-License-Identifier: GPL-2.0-only
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# SPDX-License-Identifier: GPL-2.0-only
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chip northbridge/intel/sandybridge
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chip northbridge/intel/sandybridge
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device cpu_cluster 0 on
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ops sandybridge_cpu_bus_ops
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chip cpu/intel/model_206ax
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chip cpu/intel/model_206ax
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# Magic APIC ID to locate this chip
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device cpu_cluster 0 on ops sandybridge_cpu_bus_ops end
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device lapic 0 on end
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device lapic 0xacac off end
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register "acpi_c1" = "CPU_ACPI_C1"
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register "acpi_c1" = "CPU_ACPI_C1"
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register "acpi_c2" = "CPU_ACPI_C3"
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register "acpi_c2" = "CPU_ACPI_C3"
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register "acpi_c3" = "CPU_ACPI_C7"
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register "acpi_c3" = "CPU_ACPI_C7"
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end
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end
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end
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device domain 0 on
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device domain 0 on
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ops sandybridge_pci_domain_ops
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ops sandybridge_pci_domain_ops
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end
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end
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@ -387,7 +387,6 @@ static void set_above_4g_pci(const struct device *dev)
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static void mc_gen_ssdt(const struct device *dev)
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static void mc_gen_ssdt(const struct device *dev)
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{
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{
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generate_cpu_entries(dev);
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set_above_4g_pci(dev);
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set_above_4g_pci(dev);
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}
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}
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@ -416,6 +415,7 @@ struct device_operations sandybridge_cpu_bus_ops = {
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.read_resources = noop_read_resources,
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.read_resources = noop_read_resources,
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.set_resources = noop_set_resources,
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.set_resources = noop_set_resources,
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.init = mp_cpu_bus_init,
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.init = mp_cpu_bus_init,
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.acpi_fill_ssdt = generate_cpu_entries,
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};
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};
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struct chip_operations northbridge_intel_sandybridge_ops = {
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struct chip_operations northbridge_intel_sandybridge_ops = {
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