cpu/intel/sandybridge: Use enum for ACPI C states

Also remove the now unnecessary comments from the devicetree.

Change-Id: Iebbe12fd413b7a2eb1078a579e194eba821ada7c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69292
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Arthur Heymans 2022-11-07 09:23:02 +01:00
parent 634d88c413
commit d52bfbb6aa
7 changed files with 27 additions and 16 deletions

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@ -3,10 +3,21 @@
/* Magic value used to locate this chip in the device tree */
#define SPEEDSTEP_APIC_MAGIC 0xACAC
/* Keep this in sync with acpi.c */
enum cpu_acpi_level {
CPU_ACPI_DISABLED = 0,
CPU_ACPI_C1,
CPU_ACPI_C2,
CPU_ACPI_C3,
CPU_ACPI_C6,
CPU_ACPI_C7,
CPU_ACPI_C7S,
};
struct cpu_intel_model_206ax_config {
int acpi_c1; /* ACPI C1 */
int acpi_c2; /* ACPI C2 */
int acpi_c3; /* ACPI C3 */
enum cpu_acpi_level acpi_c1;
enum cpu_acpi_level acpi_c2;
enum cpu_acpi_level acpi_c3;
int tcc_offset; /* TCC Activation Offset */
};

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@ -17,8 +17,8 @@ chip northbridge/intel/sandybridge
device lapic 0 on end
device lapic 0xacac off end
register "acpi_c1" = "3" # ACPI(C1) = MWAIT(C3)
register "acpi_c2" = "4" # ACPI(C2) = MWAIT(C6)
register "acpi_c1" = "CPU_ACPI_C3"
register "acpi_c2" = "CPU_ACPI_C6"
end
end

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@ -8,8 +8,8 @@ chip northbridge/intel/sandybridge
device lapic 0 on end
device lapic 0xacac off end
register "acpi_c2" = "4" # ACPI(C2) = MWAIT(C3)
register "acpi_c3" = "0" # ACPI(C3) = MWAIT(C7)
register "acpi_c2" = "CPU_ACPI_C6"
register "acpi_c3" = "CPU_ACPI_DISABLED"
end
end

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@ -23,8 +23,8 @@ chip northbridge/intel/sandybridge
device lapic 0 on end
device lapic 0xacac off end
register "acpi_c2" = "4" # ACPI(C2) = MWAIT(C6)
register "acpi_c3" = "0"
register "acpi_c2" = "CPU_ACPI_C6"
register "acpi_c3" = "CPU_ACPI_DISABLED"
end
end

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@ -23,8 +23,8 @@ chip northbridge/intel/sandybridge
device lapic 0 on end
device lapic 0xacac off end
register "acpi_c2" = "4" # ACPI(C2) = MWAIT(C6)
register "acpi_c3" = "0"
register "acpi_c2" = "CPU_ACPI_C6"
register "acpi_c3" = "CPU_ACPI_DISABLED"
end
end

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@ -17,8 +17,8 @@ chip northbridge/intel/sandybridge
device lapic 0 on end
device lapic 0xacac off end
register "acpi_c1" = "3" # ACPI(C1) = MWAIT(C3)
register "acpi_c2" = "4" # ACPI(C2) = MWAIT(C6)
register "acpi_c1" = "CPU_ACPI_C3"
register "acpi_c2" = "CPU_ACPI_C6"
end
end

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@ -8,9 +8,9 @@ chip northbridge/intel/sandybridge
device lapic 0 on end
device lapic 0xacac off end
register "acpi_c1" = "1" # ACPI(C1) = MWAIT(C1)
register "acpi_c2" = "3" # ACPI(C2) = MWAIT(C3)
register "acpi_c3" = "5" # ACPI(C3) = MWAIT(C7)
register "acpi_c1" = "CPU_ACPI_C1"
register "acpi_c2" = "CPU_ACPI_C3"
register "acpi_c3" = "CPU_ACPI_C7"
end
end