soc/intel/apollolake: Fix prev_sleep_state on G3 exit
If waking up from S5, then prev_sleep_state was correct but not when waking up from G3. Change-Id: I39011a0846f042d224a7cd65f736e749acc8ec75 Signed-off-by: Hannah Williams <hannah.williams@intel.com> Reviewed-on: https://review.coreboot.org/23221 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -186,6 +186,17 @@ void soc_fill_power_state(struct chipset_power_state *ps)
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ps->gen_pmcon1, ps->gen_pmcon2, ps->gen_pmcon3);
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ps->gen_pmcon1, ps->gen_pmcon2, ps->gen_pmcon3);
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}
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}
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/* Return 0, 3, or 5 to indicate the previous sleep state. */
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int soc_prev_sleep_state(const struct chipset_power_state *ps,
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int prev_sleep_state)
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{
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/* WAK_STS bit will not be set when waking from G3 state */
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if (!(ps->pm1_sts & WAK_STS) && (ps->gen_pmcon1 & COLD_BOOT_STS))
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prev_sleep_state = ACPI_S5;
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return prev_sleep_state;
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}
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void enable_pm_timer_emulation(void)
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void enable_pm_timer_emulation(void)
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{
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{
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/* ACPI PM timer emulation */
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/* ACPI PM timer emulation */
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