soc/intel/apollolake: Fix prev_sleep_state on G3 exit

If waking up from S5, then prev_sleep_state was correct but not when
waking up from G3.

Change-Id: I39011a0846f042d224a7cd65f736e749acc8ec75
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Reviewed-on: https://review.coreboot.org/23221
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Hannah Williams 2018-01-04 11:57:14 -08:00 committed by Martin Roth
parent 71053a9f39
commit cdecc0db4b
1 changed files with 11 additions and 0 deletions

View File

@ -186,6 +186,17 @@ void soc_fill_power_state(struct chipset_power_state *ps)
ps->gen_pmcon1, ps->gen_pmcon2, ps->gen_pmcon3);
}
/* Return 0, 3, or 5 to indicate the previous sleep state. */
int soc_prev_sleep_state(const struct chipset_power_state *ps,
int prev_sleep_state)
{
/* WAK_STS bit will not be set when waking from G3 state */
if (!(ps->pm1_sts & WAK_STS) && (ps->gen_pmcon1 & COLD_BOOT_STS))
prev_sleep_state = ACPI_S5;
return prev_sleep_state;
}
void enable_pm_timer_emulation(void)
{
/* ACPI PM timer emulation */