soc/intel/meteorlake: Add Meteor Lake MCH device ID

Add Meteor Lake MCH device ID 0x7d15.

TEST=Build and verify boot on MTL RVP

With patch, coreboot log:
`[DEBUG]  MCH: device id 7d15 (rev 00) is Meteorlake P`

Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: If46b01910239173cd74bf6eebc69a81291b6e15a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69560
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>

src/include/device/pci_ids.h

@@ -4131,6 +4131,7 @@
 #define PCI_DID_INTEL_MTL_P_ID_1		0x7D01
 #define PCI_DID_INTEL_MTL_P_ID_2		0x7D02
 #define PCI_DID_INTEL_MTL_P_ID_3		0x7d14
+#define PCI_DID_INTEL_MTL_P_ID_4		0x7d15
 #define PCI_DID_INTEL_RPL_P_ID_1		0xa706
 #define PCI_DID_INTEL_RPL_P_ID_2		0xa707
 #define PCI_DID_INTEL_RPL_P_ID_3		0xa708

src/soc/intel/common/block/systemagent/systemagent.c

@@ -340,6 +340,7 @@ static const unsigned short systemagent_ids[] = {
 	PCI_DID_INTEL_MTL_P_ID_1,
 	PCI_DID_INTEL_MTL_P_ID_2,
 	PCI_DID_INTEL_MTL_P_ID_3,
+	PCI_DID_INTEL_MTL_P_ID_4,
 	PCI_DID_INTEL_GLK_NB,
 	PCI_DID_INTEL_APL_NB,
 	PCI_DID_INTEL_CNL_ID_U,

src/soc/intel/meteorlake/bootblock/report_platform.c

@@ -29,6 +29,7 @@ static struct {
 	{ PCI_DID_INTEL_MTL_P_ID_1, "MeteorLake P" },
 	{ PCI_DID_INTEL_MTL_P_ID_2, "MeteorLake P" },
 	{ PCI_DID_INTEL_MTL_P_ID_3, "MeteorLake P" },
+	{ PCI_DID_INTEL_MTL_P_ID_4, "MeteorLake P" },
 };
 
 static struct {

src/soc/intel/meteorlake/chip.h

@@ -22,6 +22,7 @@ enum soc_intel_meteorlake_power_limits {
 	MTL_P_POWER_LIMITS_1,
 	MTL_P_POWER_LIMITS_2,
 	MTL_P_POWER_LIMITS_3,
+	MTL_P_POWER_LIMITS_4,
 	MTL_POWER_LIMITS_COUNT
 };
 

src/soc/intel/meteorlake/systemagent.c

@@ -77,6 +77,9 @@ void soc_systemagent_init(struct device *dev)
 	case PCI_DID_INTEL_MTL_P_ID_3:
 		soc_config = &config->power_limits_config[MTL_P_POWER_LIMITS_3];
 		break;
+	case PCI_DID_INTEL_MTL_P_ID_4:
+		soc_config = &config->power_limits_config[MTL_P_POWER_LIMITS_4];
+		break;
 	default:
 		printk(BIOS_ERR, "unknown SA ID: 0x%4x, skipping power limits configuration\n",
 			sa_pci_id);