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mainboard/google/poppy: SD card changes 

1. Disable WP
2. Pass SD card detect info in ACPI

BUG=chrome-os-partner:60713
BRANCH=None
TEST=Verified that OS is able to detect SD card and read/write to it.

Change-Id: Ide84d4b86c0fac50a07520dfd76d6d3a921f2ecc
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/18138
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh 2017-01-13 17:27:36 -08:00 committed by Duncan Laurie
parent b4a159706e
commit d093e4a387
2 changed files with 4 additions and 1 deletions
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3
src/mainboard/google/poppy/devicetree.cb
View File

@ -185,6 +185,9 @@ chip soc/intel/skylake
register "speed_shift_enable" = "1" register "speed_shift_enable" = "1"
register "tdp_pl2_override" = "7" register "tdp_pl2_override" = "7"
# Use default SD card detect GPIO configuration
register "sdcard_cd_gpio_default" = "GPP_G7"
device cpu_cluster 0 on device cpu_cluster 0 on
device lapic 0 on end device lapic 0 on end
end end

2
src/mainboard/google/poppy/gpio.h
View File

@ -210,7 +210,7 @@ static const struct pad_config gpio_table[] = {
/* SD_DATA3 */ PAD_CFG_NF(GPP_G4, NONE, DEEP, NF1), /* SD_DATA3 */ PAD_CFG_NF(GPP_G4, NONE, DEEP, NF1),
/* SD_CD# */ PAD_CFG_NF(GPP_G5, NONE, DEEP, NF1), /* SD_CD# */ PAD_CFG_NF(GPP_G5, NONE, DEEP, NF1),
/* SD_CLK */ PAD_CFG_NF(GPP_G6, NONE, DEEP, NF1), /* SD_CLK */ PAD_CFG_NF(GPP_G6, NONE, DEEP, NF1),
/* SD_WP */ PAD_CFG_NF(GPP_G7, NONE, DEEP, NF1), /* SD_WP */ PAD_CFG_NF(GPP_G7, 20K_PD, DEEP, NF1),
/* BATLOW# */ PAD_CFG_NF(GPD0, NONE, DEEP, NF1), /* BATLOW# */ PAD_CFG_NF(GPD0, NONE, DEEP, NF1),
/* ACPRESENT */ PAD_CFG_NF(GPD1, NONE, DEEP, NF1), /* ACPRESENT */ PAD_CFG_NF(GPD1, NONE, DEEP, NF1),