soc/intel/cannonlake: Fix comment errors for SMBUS

On CannonLake PCH, SMBUS stays at Bus 0 Device 31 and Function 4,
previous comment in southbridge.asl mention it as Function 3 that was a
mistake.

BUG=N/A
TEST=N/A

Change-Id: I29786457379809b6fcb592e1136ff612539e24dc
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/28366
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
This commit is contained in:
Lijian Zhao 2018-08-27 11:14:23 -07:00 committed by Martin Roth
parent 0e788c985c
commit d145c95208
1 changed files with 1 additions and 1 deletions

View File

@ -37,7 +37,7 @@
/* Serial IO */
#include "serialio.asl"
/* SMBus 0:1f.3 */
/* SMBus 0:1f.4 */
#include "smbus.asl"
/* USB XHCI 0:14.0 */