soc/intel/icelake: Make use of common thermal code for ICL

This patch ports CB:34522 and CB:33147 changes from CNL to ICL.

TEST=Build and boot dragonegg

Change-Id: I0b983005f16fe182e634eac63fef4f6b22197a85
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34649
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2019-08-01 11:00:17 +05:30
parent c077b2274b
commit d19b3ca90d
3 changed files with 14 additions and 1 deletions

View File

@ -148,6 +148,7 @@ chip soc/intel/icelake
#| | required to set up a BAR |
#| | for TPM communication |
#| | before memory is up |
#| pch_thermal_trip | PCH Trip Temperature |
#+-------------------+---------------------------+
register "common_soc_config" = "{
@ -165,6 +166,7 @@ chip soc/intel/icelake
.sda_hold = 36,
}
},
.pch_thermal_trip = 77,
}"
# GPIO PM programming
@ -181,7 +183,7 @@ chip soc/intel/icelake
device pci 00.0 on end # Host Bridge
device pci 02.0 on end # Integrated Graphics Device
device pci 04.0 off end # SA Thermal device
device pci 12.0 off end # Thermal Subsystem
device pci 12.0 on end # Thermal Subsystem
device pci 12.5 off end # UFS SCS
device pci 12.6 off end # GSPI #2
device pci 14.0 on

View File

@ -51,6 +51,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_SA
select SOC_INTEL_COMMON_BLOCK_SMM
select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
select SOC_INTEL_COMMON_BLOCK_THERMAL
select SOC_INTEL_COMMON_PCH_BASE
select SOC_INTEL_COMMON_RESET
select SSE2

View File

@ -23,6 +23,7 @@
#include <intelblocks/lpc_lib.h>
#include <intelblocks/pcr.h>
#include <intelblocks/tco.h>
#include <intelblocks/thermal.h>
#include <reg_script.h>
#include <spi-generic.h>
#include <soc/p2sb.h>
@ -62,6 +63,15 @@ static void pch_finalize(void)
/* TCO Lock down */
tco_lockdown();
/*
* Set low maximum temp threshold value used for dynamic thermal sensor
* shutdown consideration.
*
* If Dynamic Thermal Shutdown is enabled then PMC logic shuts down the
* thermal sensor when CPU is in a C-state and DTS Temp <= LTT.
*/
pch_thermal_configuration();
/*
* Disable ACPI PM timer based on dt policy
*