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Clobber registers as appropriate in AMD CAR code, and 

build a better barrier for gcc to reflush all registers
when moving the stack.  memcpy was taken from Linux.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5153 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Rudolf Marek 2010-02-23 21:43:42 +00:00 committed by Patrick Georgi
parent 740b587baa
commit d1fc066697
2 changed files with 32 additions and 49 deletions
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47
src/cpu/amd/car/disable_cache_as_ram.c
View File

@ -2,62 +2,49 @@
/* be warned, this file will be used other cores and core 0 / node 0 */ /* be warned, this file will be used other cores and core 0 / node 0 */
static inline __attribute__((always_inline)) void disable_cache_as_ram(void) static inline __attribute__((always_inline)) void disable_cache_as_ram(void)
{ {
__asm__ __volatile__ (
__asm__ volatile (
/* We don't need cache as ram for now on */ /* We don't need cache as ram for now on */
/* disable cache */ /* disable cache */
"movl %cr0, %eax\n\t" "movl %%cr0, %%eax\n\t"
"orl $(0x1<<30),%eax\n\t" "orl $(0x1<<30),%%eax\n\t"
"movl %eax, %cr0\n\t" "movl %%eax, %%cr0\n\t"
/* clear sth */ /* clear sth */
"movl $0x269, %ecx\n\t" /* fix4k_c8000*/ "movl $0x269, %%ecx\n\t" /* fix4k_c8000*/
"xorl %edx, %edx\n\t" "xorl %%edx, %%edx\n\t"
"xorl %eax, %eax\n\t" "xorl %%eax, %%eax\n\t"
"wrmsr\n\t" "wrmsr\n\t"
#if CONFIG_DCACHE_RAM_SIZE > 0x8000 #if CONFIG_DCACHE_RAM_SIZE > 0x8000
"movl $0x268, %ecx\n\t" /* fix4k_c0000*/ "movl $0x268, %%ecx\n\t" /* fix4k_c0000*/
"wrmsr\n\t" "wrmsr\n\t"
#endif #endif
/* disable fixed mtrr from now on, it will be enabled by coreboot_ram again*/ /* disable fixed mtrr from now on, it will be enabled by coreboot_ram again*/
"movl $0xC0010010, %ecx\n\t" "movl $0xC0010010, %%ecx\n\t"
// "movl $SYSCFG_MSR, %ecx\n\t" // "movl $SYSCFG_MSR, %ecx\n\t"
"rdmsr\n\t" "rdmsr\n\t"
"andl $(~(3<<18)), %eax\n\t" "andl $(~(3<<18)), %%eax\n\t"
// "andl $(~(SYSCFG_MSR_MtrrFixDramModEn | SYSCFG_MSR_MtrrFixDramEn)), %eax\n\t" // "andl $(~(SYSCFG_MSR_MtrrFixDramModEn | SYSCFG_MSR_MtrrFixDramEn)), %eax\n\t"
"wrmsr\n\t" "wrmsr\n\t"
/* Set the default memory type and disable fixed and enable variable MTRRs */ /* Set the default memory type and disable fixed and enable variable MTRRs */
"movl $0x2ff, %ecx\n\t" "movl $0x2ff, %%ecx\n\t"
// "movl $MTRRdefType_MSR, %ecx\n\t" // "movl $MTRRdefType_MSR, %ecx\n\t"
"xorl %edx, %edx\n\t" "xorl %%edx, %%edx\n\t"
/* Enable Variable and Disable Fixed MTRRs */ /* Enable Variable and Disable Fixed MTRRs */
"movl $0x00000800, %eax\n\t" "movl $0x00000800, %%eax\n\t"
"wrmsr\n\t" "wrmsr\n\t"
/* enable cache */ /* enable cache */
"movl %cr0, %eax\n\t" "movl %%cr0, %%eax\n\t"
"andl $0x9fffffff,%eax\n\t" "andl $0x9fffffff,%%eax\n\t"
"movl %eax, %cr0\n\t" "movl %%eax, %%cr0\n\t"
::: "memory", "eax", "ecx", "edx"
); );
} }
static void disable_cache_as_ram_bsp(void) static void disable_cache_as_ram_bsp(void)
{ {
__asm__ volatile (
// "pushl %eax\n\t"
"pushl %edx\n\t"
"pushl %ecx\n\t"
);
disable_cache_as_ram(); disable_cache_as_ram();
__asm__ volatile (
"popl %ecx\n\t"
"popl %edx\n\t"
// "popl %eax\n\t"
);
} }

34
src/cpu/amd/car/post_cache_as_ram.c
View File

@ -10,14 +10,20 @@ static inline void print_debug_pcar(const char *strval, uint32_t val)
printk_debug("%s%08x\r\n", strval, val); printk_debug("%s%08x\r\n", strval, val);
} }
/* from linux kernel 2.6.32 asm/string_32.h */
static void inline __attribute__((always_inline)) memcopy(void *dest, const void *src, unsigned long bytes) static void inline __attribute__((always_inline)) memcopy(void *dest, const void *src, unsigned long bytes)
{ {
__asm__ volatile( int d0, d1, d2;
"cld\n\t" asm volatile("cld ; rep ; movsl\n\t"
"rep; movsl\n\t" "movl %4,%%ecx\n\t"
: /* No outputs */ "andl $3,%%ecx\n\t"
: "S" (src), "D" (dest), "c" ((bytes)>>2) "jz 1f\n\t"
); "rep ; movsb\n\t"
"1:"
: "=&c" (d0), "=&D" (d1), "=&S" (d2)
: "0" (bytes / 4), "g" (bytes), "1" ((long)dest), "2" ((long)src)
: "memory", "cc");
} }
/* Disable Erratum 343 Workaround, see RevGuide for Fam10h, Pub#41322 Rev 3.33 */ /* Disable Erratum 343 Workaround, see RevGuide for Fam10h, Pub#41322 Rev 3.33 */
@ -66,27 +72,17 @@ static void post_cache_as_ram(void)
/* from here don't store more data in CAR */ /* from here don't store more data in CAR */
vErrata343(); vErrata343();
#if 0
__asm__ volatile (
"pushl %eax\n\t"
);
#endif
memcopy((void *)((CONFIG_RAMTOP)-CONFIG_DCACHE_RAM_SIZE), (void *)CONFIG_DCACHE_RAM_BASE, CONFIG_DCACHE_RAM_SIZE); //inline memcopy((void *)((CONFIG_RAMTOP)-CONFIG_DCACHE_RAM_SIZE), (void *)CONFIG_DCACHE_RAM_BASE, CONFIG_DCACHE_RAM_SIZE); //inline
// dump_mem((CONFIG_RAMTOP) - 0x8000, (CONFIG_RAMTOP) - 0x7c00); // dump_mem((CONFIG_RAMTOP) - 0x8000, (CONFIG_RAMTOP) - 0x7c00);
__asm__ volatile ( __asm__ volatile (
/* set new esp */ /* before CONFIG_RAMBASE */ /* set new esp */ /* before CONFIG_RAMBASE */
"subl %0, %%ebp\n\t"
"subl %0, %%esp\n\t" "subl %0, %%esp\n\t"
::"a"( (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE)- (CONFIG_RAMTOP) ) ::"a"( (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE)- (CONFIG_RAMTOP) )
); // We need to push %eax to the stack (CAR) before copy stack and pop it later after copy stack and change esp /* discard all registers (eax is used for %0), so gcc redo everything
#if 0 after the stack is moved */
__asm__ volatile ( : "cc", "memory", "%ebx", "%ecx", "%edx", "%esi", "%edi", "%ebp"
"popl %eax\n\t"
); );
#endif
/* We can put data to stack again */ /* We can put data to stack again */