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soc/amd/common/fsp: check fsp image revision 

Check if FSP binary and coreboot FSP structures (fspmupd.h) match
sufficiently.

A change in minor number denotes less critical changes or additions
to the FSP API that still allow for the boot process to proceed.
A change of the AMD image revision major number will halt boot.
The Fspmupd.h header now defines IMAGE_REVISION_ macros for AMD
Picasso, Cezanne and Sabrina APUs.

BUG=b:184650244
TEST=build, boot and check fsp image revision info. Example:

FSP major    = 1
FSP minor    = 0
FSP revision = 5
FSP build    = 0

Signed-off-by: Julian Schroeder <julianmarcusschroeder@gmail.com>
Change-Id: I0fbf9413b0cf3e6093ee9c61ff692ff78ebefebc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61281
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Julian Schroeder 2022-01-20 15:09:52 -06:00 committed by Felix Held
parent 3a96074441
commit d2e278df33
4 changed files with 55 additions and 2 deletions
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41
src/soc/amd/common/fsp/fsp_validate.c
View File

@ -4,12 +4,49 @@
#include <fsp/util.h>
#include <types.h>
struct amd_image_revision {
uint8_t build;
uint8_t revision;
uint8_t minor;
uint8_t major;
} __packed;
/* Validate the FSP-M header in romstage */
void soc_validate_fspm_header(const struct fsp_header *hdr)
{
struct amd_image_revision *rev;
rev = (struct amd_image_revision *) &(hdr->image_revision);
/* Check if the image fits into the reserved memory region */
if (hdr->image_size > CONFIG_FSP_M_SIZE)
die("The FSP-M binary is %u bytes larger than the memory region allocated for "
"it. Increase FSP_M_SIZE to make it fit.\n",
die("The FSP-M binary is %u bytes larger than the memory region"
" allocated for it. Increase FSP_M_SIZE to make it fit.\n",
hdr->image_size - CONFIG_FSP_M_SIZE);
/* a coding bug on the AMD FSP side makes this value 1 in
older versions of the FSP.*/
if (hdr->image_revision == 1) {
printk(BIOS_ERR, "No AMD FSP image revision information available\n");
return;
}
printk(BIOS_INFO, "FSP major = %d\n", rev->major);
printk(BIOS_INFO, "FSP minor = %d\n", rev->minor);
printk(BIOS_INFO, "FSP revision = %d\n", rev->revision);
printk(BIOS_INFO, "FSP build = %d\n", rev->build);
if ((rev->major != IMAGE_REVISION_MAJOR_VERSION) ||
(rev->minor != IMAGE_REVISION_MINOR_VERSION)) {
printk(BIOS_WARNING, "FSP binary and SOC FSP header file don't match.\n");
printk(BIOS_WARNING, "include file ImageRevisionMajorVersion=%d\n",
IMAGE_REVISION_MAJOR_VERSION);
printk(BIOS_WARNING, "include file ImageRevisionMinorVersion=%d\n",
IMAGE_REVISION_MINOR_VERSION);
printk(BIOS_WARNING, "Please update FspmUpd.h based on the corresponding FSP"
" build's FspmUpd.h\n");
}
if (rev->major != IMAGE_REVISION_MAJOR_VERSION)
die("IMAGE_REVISION_MAJOR_VERSION mismatch, halting\nGoodbye now\n");
}

6
src/vendorcode/amd/fsp/cezanne/FspmUpd.h
View File

@ -114,4 +114,10 @@ typedef struct __packed {
/** Offset 0x0040**/ FSP_M_CONFIG FspmConfig;
} FSPM_UPD;
#define IMAGE_REVISION_MAJOR_VERSION 0x01
#define IMAGE_REVISION_MINOR_VERSION 0x00
#define IMAGE_REVISION_REVISION 0x05
#define IMAGE_REVISION_BUILD_NUMBER 0x00
#endif

5
src/vendorcode/amd/fsp/picasso/FspmUpd.h
View File

@ -79,4 +79,9 @@ typedef struct __packed {
/** Offset 0x0040**/ FSP_M_CONFIG FspmConfig;
} FSPM_UPD;
#define IMAGE_REVISION_MAJOR_VERSION 0x01
#define IMAGE_REVISION_MINOR_VERSION 0x00
#define IMAGE_REVISION_REVISION 0x02
#define IMAGE_REVISION_BUILD_NUMBER 0x04
#endif

5
src/vendorcode/amd/fsp/sabrina/FspmUpd.h
View File

@ -107,4 +107,9 @@ typedef struct __packed {
/** Offset 0x0040**/ FSP_M_CONFIG FspmConfig;
} FSPM_UPD;
#define IMAGE_REVISION_MAJOR_VERSION 0x01
#define IMAGE_REVISION_MINOR_VERSION 0x00
#define IMAGE_REVISION_REVISION 0x05
#define IMAGE_REVISION_BUILD_NUMBER 0x00
#endif