rename southbridge i440bx to its actual name i8371eb

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2361 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/mainboard/bitworks/ims/auto.c

@@ -9,7 +9,7 @@
 #include "pc80/serial.c"
 #include "arch/i386/lib/console.c"
 #include "ram/ramtest.c"
-#include "southbridge/intel/i440bx/i440bx_early_smbus.c"
+#include "southbridge/intel/i8371eb/i8371eb_early_smbus.c"
 #include "superio/NSC/pc87351/pc87351_early_serial.c"
 #include "northbridge/intel/i440bx/raminit.h"
 #include "cpu/x86/mtrr/earlymtrr.c"

src/southbridge/intel/i440bx/chip.h

@@ -1,13 +0,0 @@
-#ifndef I440BX_CHIP_H
-#define I440BX_CHIP_H
-
-struct southbridge_intel_i440bx_config 
-{
-	unsigned int ide0_enable : 1;
-	unsigned int ide1_enable : 1;
-};
-
-struct chip_operations;
-extern struct chip_operations southbridge_intel_i440bx_ops;
-
-#endif /* I440BX_CHIP_H */

src/southbridge/intel/i8371eb/chip.h

@@ -0,0 +1,13 @@
+#ifndef I8371EB_CHIP_H
+#define I8371EB_CHIP_H
+
+struct southbridge_intel_i8371eb_config 
+{
+	unsigned int ide0_enable : 1;
+	unsigned int ide1_enable : 1;
+};
+
+struct chip_operations;
+extern struct chip_operations southbridge_intel_i8371eb_ops;
+
+#endif /* I8371EB_CHIP_H */

src/southbridge/intel/i8371eb/i8371eb_early_smbus.c

@@ -1,4 +1,4 @@
-#include "i440bx_smbus.h"
+#include "i8371eb_smbus.h"
 
 #define SMBUS_IO_BASE 0x0f00
 

src/southbridge/intel/i8371eb/i8371eb_smbus.c

@@ -10,7 +10,7 @@
 #include <device/pci_ops.h>
 #include <device/smbus.h>
 #include <arch/io.h>
-#include "i440bx.h"
+#include "i8371eb.h"
 
 
 static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
@@ -31,7 +31,7 @@ static struct device_operations smbus_ops = {
 	.enable_resources = pci_dev_enable_resources,
 	.init             = 0,
 	.scan_bus         = scan_static_bus,
-	.enable           = i440bx_enable,
+	.enable           = i8371eb_enable,
 	.ops_pci          = &lops_pci,
 	.ops_smbus_bus    = &lops_smbus_bus,
 };