soc/intel/canonlake: Enable LPSS UART in 32bit PCI mode

Cannonlake LPSS UART port can be working on both 32 bit and 8 bit mode.
To maintian compatibilty with previous generation of SOC, select 32 bit
mode as default.

Change-Id: Iaef8bceabc1b12e054ab4a364f98b568a9efcd85
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/21296
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/soc/intel/cannonlake/Kconfig

@@ -60,7 +60,8 @@ config UART_DEBUG
 	select CONSOLE_SERIAL
 	select BOOTBLOCK_CONSOLE
 	select DRIVERS_UART
-	select DRIVERS_UART_8250IO
+	select DRIVERS_UART_8250MEM_32
+	select NO_UART_ON_SUPERIO
 
 config UART_FOR_CONSOLE
 	int "Index for LPSS UART port to use for console"